Samsung Electronics Co., Ltd.

Minwoo Song

Namgyu Cho

Chulmin Lee

Jungmin Park

Jiwoo Lee

Wandon Kim

Geunwoo Kim

Youngmook Oh

Minsu Lee

Moonkyun Song

Ohseong Kwon

Seokjun Won

Jinkyu Jang

Kughwan Kim

HyeokJun Son

Euichan Jung

Kiseok Lee

Min Hee Cho

Hyunmog Park

Minhee Cho

Jungho Kim

Jonghan Lee

HyungSuk Jung

Chulhyung Yang

Juyoung Lim

Woobin Song

Hyun-Sil Oh

Sangyub Ie

Hyeri Hong

Younghyun Ban

Hyunsil Oh

Kyungjin Yoon

Jaeseung Cho

A method of determining a target path according to a source electronic control unit (ECU) mounted on a vehicle is provided. The method includes obtaining state information of a plurality of paths connecting the source ECU with a destination ECU, selecting the target path for target data from among the plurality of paths based on the state information, and transmitting the target data to the destination ECU through an ECU located on the selected target path, the state information including information about at least one of power consumption of an ECU located on the paths, a temperature of the ECU located on the paths, a latency of the paths, and a transmission success rate of the paths.

ECU and target path determination method thereby

A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.

Semiconductor device including a gate structure

An electronic device and method are disclosed herein. The electronic device includes communication circuitry, an output interface, memory and a processor. The processor implements the method, including: storing, in the memory, accident modeling information including at least one of a history of accidents at a present location, and a first driver profile of a driver associated with the history of accidents at the present location, receiving at least a portion of a second driver profile from at least one external vehicle proximate to the vehicle via the communication circuitry, the second driver profile indicating driving characteristics of a driver of the at least one external vehicle, generating accident risk information based at least on the accident modeling information and the second driver profile, and outputting the generated accident risk information through the output interface.

Electronic device for vehicle and operating method thereof

A three-dimensional semiconductor device includes a first channel pattern on and spaced apart from a substrate, the first channel pattern having a first end and a second end that are spaced apart from each other in a first direction parallel to a top surface of the substrate, and a first sidewall and a second sidewall connecting between the first end and the second end, the first and second sidewalls being spaced apart from each other in a second direction parallel to the top surface of the substrate, the second direction intersecting the first direction, a bit line in contact with the first end of the first channel pattern, the bit line extending in a third direction perpendicular to the top surface of the substrate, and a first gate electrode adjacent to the first sidewall of the first channel pattern.

Three-dimensional semiconductor device with a bit line perpendicular to a substrate

A semiconductor device includes: a substrate including an active region and a device isolation region; a flat plate structure formed on the substrate; an oxide semiconductor layer covering a top surface of the flat plate structure and continuously arranged on a top surface of the substrate in the active region and the device isolation region; a gate structure arranged on the oxide semiconductor layer and including a gate dielectric layer and a gate electrode; and a source/drain region arranged on both sides of the gate structure and formed in the oxide semiconductor layer, in which, when viewed from a side cross-section, an extending direction of the flat plate structure and an extending direction of the gate structure cross each other.

Semiconductor device

Disclosed are an integrated circuit for controlling function modules to a low-power status depending on an operating status, an electronic device, and a control method thereof. An integrated circuit includes at least one clock generator, a clock distribution circuit that distributes a clock generated by the at least one clock generator, a plurality of function modules that receive the clock distributed by the clock distribution circuit, a monitoring circuit that monitors operating statuses of the at least one clock generator and the clock distribution circuit, a memory, and at least one control circuit. When the operating statuses of the at least one clock generator and the clock distribution circuit monitored by the monitoring circuit correspond to a specified operating status, the at least one control circuit is configured to control at least one of at least one function module of the plurality of function modules, the at least one clock generator, or the clock distribution circuit based on a specified control method. Moreover, various embodiment found through the disclosure are possible.

Integrated circuit and electronic device for controlling function modules in low-power state according to operation state, and control method therefor

A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

Methods of fabricating semiconductor devices including differing barrier layer structures

An electronic device and a noise control method thereof are provided. The electronic device includes a cable having a first layer forming a first power line and a second layer forming a second power line. The first and second layers are arranged in a vertical stack structure. The cable cancels a magnetic field generated by a current in charging and discharging a battery cell of the electronic device, and removes a noise due to a magnetic field generated from a coil-contained component of the electronic device. Other various embodiments are possible.

Electronic device and noise control method thereof

A method of fabricating a semiconductor device includes forming first and second fin patterns in an active region and in a measurement region of a substrate, respectively, the measurement region being different from the active region, forming first and second gate electrodes to cross the first and second fin patterns, respectively, and measuring a contact potential difference (Vcpd) of the second gate electrode to determine a threshold voltage of the first gate electrode based on the measured contact potential difference (Vcpd).

Semiconductor device and method of fabricating the same

An electronic device and a method for controlling output through an external output device are provided. The electronic device includes a housing, a receptacle formed so as to receive one of a first external connector and a second external connector, and a circuit electrically coupled to the receptacle. The first external connector includes first, second, third, and fourth terminals. The second external connector includes first, second, third, and fourth terminals. The circuit is configured to detect whether one of the first and second external connectors is inserted into the receptacle, and, based on results of detection, provide an audio output to the first external connector in a first manner if the first external connector is inserted, and provide the audio output to the second external connector in a second manner different from the first manner if the second external connector is inserted.

Method and electronic device for controlling output depending on type of external output device

A semiconductor device includes a substrate including a first region and a second region, a first gate dielectric layer, a first lower gate electrode, and a first upper gate electrode sequentially stacked on the first region, a second gate dielectric layer, a second lower gate electrode, and a second upper gate electrode sequentially stacked on the second region, a first spacer disposed on a sidewall of the first upper gate electrode, a second spacer disposed on a sidewall of the second upper gate electrode, a third spacer covering the first spacer on the sidewall of the first upper gate electrode, and a fourth spacer covering the second spacer on the sidewall of the second upper gate electrode. At least one of a first sidewall of the first lower gate electrode and a second sidewall of the first lower gate electrode is in contact with the third spacer.

Semiconductor devices and methods for fabricating the same

Growing community of inventors

Seongnam-si, South Korea

Minwoo Song