Kabushiki Kaisha Toshiba

Minoru Takahashi

Atsushi Yagishita

Fumitomo Matsuoka

Tomohiro Saito

Satoshi Inaba

Yukihiro Ushiku

Yoshiaki Matsushita

Norihiko Tsuchiya

Makoto Yoshimi

Yasunori Okayama

Masanori Numano

Hiroyasu Kubota

Yoshiki Hayashi

Kazunari Ishimaru

Naoyuki Shigyo

A semiconductor device where an interface circuit operating on a high power supply voltage and exchanging signals and data with an external device and an internal circuit operating on a low power supply voltage are integrated in a single chip. The interface circuit includes a transistor whose gate insulating film is made of SiO . The internal circuit includes a transistor whose gate insulating film is made of an oxynitride film of nitrogen-added SiO . Boron or BF has been introduced into the gate electrodes of the p-channel transistors among those whose gate insulating films have been made of an oxynitride film.

MOSFET gate insulating film and method of manufacturing the same

A semiconductor device where an interface circuit operating on a high power supply voltage and exchanging signals and data with an external device and an internal circuit operating on a low power supply voltage are integrated in a single chip. The interface circuit includes a transistor whose gate insulating film is made of SiO,. The internal circuit includes a transistor whose gate insulating film is made of an oxynitride film of nitrogen-added SiO,. Boron or BF,has been introduced into the gate electrodes of the p-channel transistors among those whose gate insulating films have been made of an oxynitride film.

MOSFET gate insulating films with oxynitride and oxide

A semiconductor device includes an underlying layer formed by a first insulation layer, a plurality of island semiconductor layers formed on the first insulation layer, source and drain regions formed in each of the island semiconductor layers, a first gate electrode formed between the source and drain regions and formed on and insulated from the island semiconductor layer, a second insulation layer formed on the sides of the island semiconductor layer and along the periphery of the first gate electrode, the second insulation layer being higher than the surface of the island semiconductor layer and lower than the surface of the first gate electrode, and a second gate electrode formed over both the first gate electrode and the second insulation layer.

Semiconductor device and method of manufacturing the same

A method of manufacturing a semiconductor device includes the steps of forming a trench for isolating an element region on a semiconductor substrate, burying a first oxide film in the trench so as to contact a surface of the trench, flattening a surface of the first oxide film, heating the semiconductor substrate to form a second oxide film at an interface between the surface of the trench and the first oxide film, and annealing the semiconductor substrate.

Method of manufacturing a gap filling for shallow trench isolation

Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

Dielectrically isolated substrate and method for manufacturing the same

A semiconductor device has a semiconductor substrate having a groove, and a semiconductor element formed in a surface region of the semiconductor substrate. A substance having a thermal expansion coefficient different from the semiconductor substrate is embedded in at least a portion of the groove, a crystal defect is generated from the region near the bottom of the groove in the semiconductor substrate, thereby alleviating stress and strain in other regions of the semiconductor substrate, such that such regions cannot generate crystal defects in a region necessary for a circuit operation of the semiconductor element of the surface region.

Semiconductor device and a method for manufacturing the same

Method of manufacturing thin film transistor

In a semiconductor device having a thin SOI film, the thickness of a semiconductor layer formed on an insulating film is so adjusted as to be less than a maximum distance allowable to complete depletion of the layer. While the thickness of a channel region is adjusted to be less than that of impurity-diffusion regions. Further, the insulating layer is so formed to have a thicker portion under the channel region, and thinner portions under the source region and the drain region as the impurity-diffusion regions. The semiconductor layer has steps at the boundaries between the channel region and the impurity-diffusion regions, and the top face of the channel region is arranged so as to be lower than the top faces of the impurity-diffusion regions. A region having a width less than the maximum depletion distance and an impurity concentration larger, than that of the channel region and less than that of the drain region is formed between the channel region and the drain region.

Semiconductor device having a single crystal semiconductor layer formed

On the surface of an insulating substrate, a semi-conductor layer composed of a semiconductor layer of a first conductivity type on which a high-concentration semiconductor layer of the first conductivity type is formed. By selectively etching the semiconductor layer, the high-concentration external base region of the first conductivity is left, and at the same time, only a thicker prospective internal base region just under the external base region and a prospective emitter region and prospective collector region, which are located on both sides of the prospective internal base region and have steps between themselves and the prospective internal base region, are left to form island regions. A sidewall insulating film is formed which covers at least the sidewalls on the prospective collector region side among sidewalls of the external base region and sidewalls at the steps of the prospective internal base region adjoining the sidewalls of the external base region. The emitter region and collector region of the second conductivity type are formed by ion implantation perpendicular to the substrate with the insulating film covering the external base region and the sidewall insulating film as blocking mask.

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Yokohama, Japan

Minoru Takahashi