Fujitsu Corporation

Minoru Shoji

Fumiyasu Hirose

A logic simulation method and apparatus for sequentially performing a high-speed simulation of a logic circuit designed through sequential processing descriptions. An operation control unit corresponds to each of a plurality of operations described in sequential processing descriptions. The operation control unit controls a start of an operation and determines an end of the operation. After determining an end of a first operation by simulating operation of the operation control unit corresponding to the first operation, a next operation described in sequential processing descriptions is simulated concurrently with simulating an operation control unit corresponding to the next operation until all operations have been sequenced through.

Logic simulation method

A gate addressing system of a logic simulation machine performs translation from data of a circuit design data base to circuit data for the logic simulation machine. The system numbers each input terminal of a circuit and each gate of said circuit without using numbers corresponding to the number of fanout gates minus one to which an output signal of an input terminal or a gate is applied between the numbers of one input terminal and another input terminal, one input terminal and one gate, one gate and another gate or one gate and one input terminal. It starts a list of numbers of fanout gates of each input terminal or each gate at an address as the number assigned to said input terminal and gate in a table representing connection relationships among input terminals and gates and among gates.

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Kawasaki, Japan

Minoru Shoji