Toshiba Memory Corporation

Kioxia Corporation

Minoru Oda

Masumi Saitoh

Kiwamu Sakuma

Masato Shini

Shinji Mori

Kotaro Noda

Akira Yotsumoto

Yuka Itano

Ryo Inoue

Yuanting Wang

A semiconductor storage device includes a first substrate, a second substrate, a first stacked body, and a second stacked body. The first stacked body is provided between the first substrate and the second substrate and includes a first trace, a first pad connected to the first trace, and a first insulator. The second stacked body is provided between the first stacked body and the second substrate and includes a second trace, a second pad connected to the second trace, and a second insulator. The first pad includes a plurality of first electrode portions connected to the first trace. The first insulator is provided between the plurality of first electrode portions. The plurality of first electrode portions are bonded to the second pad.

Semiconductor storage device and method for fabricating semiconductor storage device

According to one embodiment, a memory system includes a first memory and a controller. The controller includes first and second decoders, first and second circuits, a register, and a switching circuit. The first and second decoders decode first and second commands respectively, which include first and second addresses respectively. The first and second circuits access the first memory using the first and second addresses respectively. A value stored in the register is changeable by a host. The switching circuit switches between the first and second circuits to access the first memory according to the value in the register.

Memory system

A semiconductor device according to an embodiment includes first and second chips, and a first conductor. The first chip includes a first substrate, a first circuit and a first joint metal. The first circuit is provided on the first substrate. The first joint metal is connected to the first circuit. The second chip includes a second substrate, a second circuit, and a second joint metal. The second substrate includes P-type and N-type well regions. The second circuit is provided on the second substrate and includes a first transistor. The second joint metal is connected to the second circuit and the first joint metal. The first conductor is connected to the N-type well region from a top region of the second chip. The P-type well region is arranged between a gate electrode of the first transistor and the N-type well region.

Semiconductor device and manufacturing method of the same

A semiconductor device includes a semiconductor substrate, a source or drain layer provided in the semiconductor substrate, a gate insulation layer provided on a surface of the semiconductor substrate, and a gate electrode that is provided on the gate insulation layer. The semiconductor device further includes a first contact that is provided on the source or drain layer, the first contact including a stacked body in which a plurality of first layers and one or more second layers are alternately stacked, and a second contact that faces at least one of a side surface and an upper surface of the first contact disposed on the source or drain layer.

Semiconductor device

A storage device including a transistor portion including a transistor, a plurality of interlayer insulating films provided above the transistor portion, a plurality of first conductive layers provided respectively between the plurality of interlayer insulating films, and a second conductive layer extending through the plurality of interlayer insulating films and the plurality of first conductive layers, the second conductive layer having one end electrically connected to the transistor portion, and a part that extends beyond a portion of the transistor portion.

Storage device

According to one embodiment, a semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a first electrode. The third semiconductor layer is provided between the first semiconductor layer and the second semiconductor layer. The first electrode opposes the third semiconductor layer. An orientation ratio of the third semiconductor layer is higher than an orientation ratio of the first semiconductor layer.

Thin film semiconductor device

According to one embodiment, a semiconductor device includes first to third semiconductor regions and first to third conductors. The second semiconductor region is separated from the first semiconductor region in a first direction. The third semiconductor region is provided between the first and the second semiconductor regions. The third conductor is separated from the third semiconductor region in a second direction intersecting the first direction. The third semiconductor region includes first and second partial regions. The first partial region includes a first metal element, and is amorphous. The second partial region is stacked with the first partial region in the second direction, and is polycrystalline. A first concentration of the first metal element in the first partial region is higher than a second concentration of the first metal element in the second partial region, or the second partial region does not include the first metal element.

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Yokkaichi Mie, Japan

Minoru Oda