Rohm Co., Ltd.

Rohm Gmbh

Minoru Nakagawa

Yuki Nakano

Masatoshi Aketa

Seigo Mori

Kenji Yamamoto

Masaya Ueno

Takui Sakaguchi

A semiconductor device includes a semiconductor layer of a first conductivity type having a first main surface at one side and a second main surface at another side, a trench gate structure including a gate trench formed in the first main surface of the semiconductor layer, and a gate electrode embedded in the gate trench via a gate insulating layer, a trench source structure including a source trench formed deeper than the gate trench and across an interval from the gate trench in the first main surface of the semiconductor layer, a source electrode embedded in the source trench, and a deep well region of a second conductivity type formed in a region of the semiconductor layer along the source trench, a ratio of a depth of the trench source structure with respect to a depth of the trench gate structure being not less than 1.5 and not more than 4.0, a body region of the second conductivity type formed in a region of a surface layer portion of the first main surface of the semiconductor layer between the gate trench and the source trench, a source region of the first conductivity type formed in a surface layer portion of the body region, and a drain electrode connected to the second main surface of the semiconductor layer.

Semiconductor device

A semiconductor deviceincludes a trench gate structureformed in a surface layer portion of a first principal surface of a semiconductor layer. A source regionand a well regionare formed in a surface layer portion of the first principal surface of the semiconductor layer at a side of the trench gate structure. The well regionis formed in a region at a side of the second principal surface of the semiconductor layer with respect to the source region. A channel is formed along the trench gate structurein a portion of the well region. A multilayer regionis formed in a region between the trench gate structureand the source regionin the semiconductor layer. The multilayer regionhas a p type impurity regionformed in the surface layer portion of the first principal surface of the semiconductor layer and an n type impurity regionformed in a side of the second principal surface of the semiconductor layer with respect to the second conductivity type impurity region

Growing community of inventors

Kyoto, Japan

Minoru Nakagawa