Matsushita Electric Industrial Co., Ltd.

Minoru Miyata

Naoji Okumura

Hideyo Uwabata

Kazuto Tanaka

Katsumi Terai

Satoshi Okamoto

Hiroshi Ando

Yutaka Nio

Hiroyuki Nagai

Akira Usui

Toshiaki Tsuji

Kazuhiko Kubo

Keisuke Yamamoto

Toshihiro Miyoshi

Masaaki Fujita

Masahiko Sasada

Hideyuki Ikuhara

Toshiaki Kitahara

Hiroki Kinugawa

Naoki Kurita

Shigeru Kawakami

Namio Yamaguti

Tadashi Yamada

A parallel scanning circuit outputs a parallel scanning signal for making forward and backward scanning lines parallel. A vertical correlation detection circuit detects a portion where the change in luminance in the vertical direction exceeds a predetermined value on the basis of a luminance signal, and outputs a movement control signal representing the distance of movement on the screen of the scanning line. A retrace period reversion circuit reverses the lime axis of the movement control signal in a retrace period. A clamping circuit clamps the movement control signal to a predetermined DC voltage at the timing of horizontal synchronizing signal. A synthesizing circuit synthesizes the parallel scanning signal and the movement control signal, and feeds a synthesized signal as a vertical velocity modulation signal to a vertical velocity modulation coil.

Video display apparatus with vertical scan velocity modulation and video display method thereof

A video signal of an interlaced scanning system having 525 scanning lines and a vertical scanning frequency of 60 Hz is converted to a video signal having 1050 scanning lines and a vertical scanning frequency of 120 Hz, for displaying an image by bidirectional scanning. A vertical synchronizing signal is subjected to offset processing by a &frac14; horizontal scanning period when an odd field is started, thereby keeping interlaced relation between odd and even fields. The vertical synchronizing signal is subjected to offset processing by a &frac12; horizontal scanning period every frame, so that the scanning direction for each scanning line is reversed every frame.

Video display apparatus with scan conversion and reversion and a video display method using scan conversion and reversion

A video signal converter converts a video signal to a required form. The required form of the signal is the display format for displaying the signal. The input signal is converted to a digital signal and stored in a memory using the output of a first clock pulse generator synchronized to the horizontal synchronizing signal of the input signal. The digital signal is read out from the memory using the output of a second clock pulse generator synchronized to the vertical synchronizing signal of the input signal from a position specified by the controller. The output digital signal is then reconverted to an analog signal.

Video signal converter and television signal processing apparatus

A multi-standard television receiver in accordance with the present invention includes a plurality of video signal processing blocks having tristate functions at their output terminals, at least one memory block used in common for a plurality of video signal processing blocks and a video signal processing selection means for selecting one of the video signal processing blocks and independently controlling the output terminals of the video signal processing blocks using elements having a tristate function and can reduce power consumption by working only a selected video signal processing block and stopping the other video signal processing blocks. Further, using elements having a tristate function, possibility of element breakdown at selection and control of the elements can be removed.

Television receiver for receiving multi-standards

The object of the present invention is to easily compensate automatic brightness limiting performance and automatic contrast limiting performance even if a picture is displayed with a different aspect ratio and to prevent deterioration of picture quality such as gradation and sharpness. A picture display apparatus includes (1) an automatic brightness limiter (ABL) circuit including a comparison circuit for varying an EHT compensation starting point, an ABL gain control circuit for varying a slope of the EHT characteristic versus the APL, an ABL comparison voltage generator, a DAC for adjusting an ABL compensation starting point and a DAC for adjusting an ABL gain and (2) an automatic contrast limiter (ACL) circuit including another comparison circuit for varying an EHT compensation starting point, an ACL gain control circuit for varying a slope of the EHT characteristic versus the APL, an ACL comparison voltage generator, a DAC for adjusting an ACL compensation starting point and a DAC for adjusting an ACL gain.

Automatic brightness limiter automatic control circuit, contrast limiter

An improved horizontal contour emphasizing signal processor is provided with a detector to detect a period during which luminance signal changes are produced, a generator to generate a rectangular-wave signal during this period, and a multiplier for multiplying a first horizontal contour emphasizing signal derived from the luminance signal to the rectangular-wave signal to generate a second horizontal contour emphasizing signal, and in this case, a preshoot is added to the input luminance signal waveform at the starting part of a radical waveform change and an overshoot is added at the ending part of the waveform change in order to perform finer horizontal contour emphasizing.

Horizontal contour emphasizing signal processor

A channel selection apparatus having a double superhet tuner section (15) for converting one of a plurality of television channels contained in an input signal to a fixedly predetermined channel, includes an AFC circuit (11) for producing a frequency control voltage to execute closed-loop frequency control of the second local oscillator (5) of the tuner section while an AFC switch (16) is set in a first condition, whereas when the AFC switch is set in a second condition, a fixed frequency control voltage is applied to the second local oscillator and the frequency control voltage is applied to adjust the oscillation frequency of the first local oscillator (2) of the tuner section such as to compensate for any offset in the transmission frequency of a currently selected channel.

Channel selection apparatus having automatic frequency compensation for

A ghost signal eliminating system which eliminates a ghost by delaying a video signal through a variable delay line by the delay time of the ghost from the true image and subtracting the delayed video signal from the original video signal. The variable delay line comprises a fine adjusting circuit for fine-adjusting the delay time and a coarse adjusting circuit for coarse-adjusting the delay time, the coarse adjusting circuit being controlled by a detection voltage for a control voltage level and the fine adjusting circuit being controlled by a voltage which is the difference between the control voltage and the detection voltage.

Ghost signal eliminating system

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Suita, Japan

Minoru Miyata