Seiko Epson Corporation

Tokyo R & D Co., Ltd.

R&d Co., Ltd.

Seiko Epson Corporation & Tokyo

Minoru Kozaki

Kunio Tabata

Kunihiko Takagi

Yoshikazu Koike

Issei Yamakoshi

Atsushi Mizukoshi

Takeo Sato

Kohichi Tadokoro

Nobuki Sasaki

Shoichiro Kasahara

Fumikazu Komatsu

Toshihiko Yamazaki

Provided is an output circuit including a logic circuit, a capacitor, a buffer circuit, and a driver circuit. When a clock signal is input and an enable signal is active, the logic circuit outputs a clock signal based on the clock signal. The buffer circuit receives a signal that is an output signal of the logic circuit via the capacitor. The driver circuit outputs a clock signal based on a signal that is an output signal of the buffer circuit. The logic circuit sets a signal to the same logic level as an input node of the buffer circuit when the enable signal is inactive.

Output circuit, circuit device, oscillator, electronic apparatus, and vehicle

A circuit device includes first and second output signal lines from which first and second output signals constituting differential output signals are output, and first to n-th output drivers coupled to the first and second output signal lines. In a first mode, i number of output drivers of the first to n-th output drivers drive the first and second output signal lines based on first and second input signals constituting differential input signals. In a second mode, j number of output drivers of the first to n-th output drivers drive the first and second output signal lines based on the first and second input signals.

Circuit device, oscillator, electronic apparatus, and vehicle

An output circuit includes first and second nodes, a regulator, a pre-driver, and an output driver. The regulator outputs a second voltage to the second node based on a first voltage applied to the first node. The output driver receives a signal from the pre-driver and outputs a second signal. The regulator short-circuits the first and second nodes while the pre-driver is in a standby state, and controls the second voltage to be different from the first voltage after the pre-driver transitions from the standby state to a normal operation state.

Output circuit having a voltage regulated pre-driver

In order to achieve a circuit device capable of stably supplying an antenna with electric power in a broad power range to output a transmission signal, the circuit device includes a current source adapted to supply a first current in a first operation mode, and supply a second current higher than the first current in a second operation mode, and a drive section supplied with the electric power from the current source, and adapted to perform drive for outputting a transmission signal to an antenna via a matching circuit.

Circuit device, electronic apparatus, and moving object

An output circuit includes a first circuit that generates a first output voltage based on a resistance ratio, on the basis of a reference voltage, a second circuit that compares the first output voltage with a source voltage of a second transistor that sets a second output voltage of the output signal, and generates an output gate voltage for causing the first transistor to output the second output voltage, and a third circuit that controls a timing at which the output gate voltage is applied to the first transistor, on the basis of an input control signal.

Output circuit, semiconductor integrated circuit, resonating device, electronic device, and moving object

A DC-DC converter is provided. The DC-DC converter is connected to a PLL circuit, supplying a voltage at least to a power source terminal of a voltage controlled oscillator of the PLL circuit. A frequency of a ripple voltage included in the voltage is less than a natural frequency of the PLL circuit or more than one-half of a frequency of an output signal of the PLL circuit.

DC-DC converter connected to phase locked loop

A circuit is provided to prevent improper locking of a DLL circuit without providing any limitation to the reference clock frequency. By detecting the time difference between edges of multi-phase clocks Ck&#x2013;Cka delay time detection signal DTcorresponding to a delay time 5&#x3c4; from the multi-phase clock Ckto the multi-phase clock Ckis generated. An Upsignal is forcibly output to a charge pump circuit CPbased on this delay time detection signal DTand the output of a Down1 signal is suppressed.

Multi-phase clock generation circuit and clock multiplication circuit

In a circuit block BL, a PMOS transistor Pand a PMOS transistor P' are connected in series between a high-level potential HL and an output terminal U; an NMOS transistor Nand an NMOS transistor N&#x2032; are connected in series between a low-level potential LL and the output terminal U. An inversion signal CkB of a clock signal Ckis inputted to the gate of the PMOS transistor P; the inversion signal CkB of the clock signal Ckis inputted to the gate of the PMOS transistor P&#x2032; through an inverter IV; a clock signal Ckis inputted to the gate of the NMOS transistor N; and the clock signal Ckis inputted to the gate of the NMOS transister N&#x2032; through an inverter IV

Multiphase-clock processing circuit and clock multiplying circuit

PMOS transistors P-Pn and PMOS transistors P'-Pn&#x2032; are respectively connected in series between a supply voltage terminal VD and output terminals OUTB, while NMOS transistors N-Nn and NMOS transistors N&#x2032;-Nn&#x2032; are respectively connected in series between the output terminals OUTB and a ground terminal G. Input terminals S-Sn are respectively connected to the gates of the PMOS transistors P&#x2032;-Pn&#x2032; and NMOS transistors N-Nn, and they are respectively connected to the gates of the PMOS transistors P-Pn and NMOS transistors N&#x2032;-Nn&#x2032; through corresponding inverters IV-IVn.

Pulse processing circuit and frequency multiplier circuit

A circuit is provided to make the propagation delay time of each signal path substantially the same without using a low resistance process even when wiring lengths are different. In the circuit, output nodes a to d are individually disposed at the output side of transmission gates TG, TG, TG, and TG, these output nodes a to d are connected so as to have an equal wiring length, inverters IVand IVare disposed at the output nodes a and d, and a common node e is disposed at a position where the wiring length from each of the inverters IVand IVbecomes identical.

OUTPUT CIRCUIT, INPUT CIRCUIT, ELECTRONIC CIRCUIT, MULTIPLEXER, DEMULTIPLEXER, WIRED-OR CIRCUIT, WIRED-AND CIRCUIT, PULSE-PROCESSING CIRCUIT, MULTIPHASE-CLOCK PROCESSING CIRCUIT, AND CLOCK-MULTIPLIER CIRCUIT

The ring oscillator circuit is made by connecting K units of inverter circuits U , U , . . . , U K in a ring shape. The inverter circuit U comprises a CMOS inverter IV which includes MOS transistors MP and MN a P-channel MOS transistor MP which functions as the current source for a CMOS inverter IV an N-channel MOS transistor MN which functions as the current source for a CMOS inverter IV and a CMOS inverter IV which is connected in parallel to the CMOS inverter IV and includes MOS transistors MP and MN

Ring oscillator circuit and a delay circuit

An electric motor vehicle having a drive system comprises a controller including an inverter device. The inverter comprises first and second series of semiconductor switches which is arranged in parallel with a power source. When a key switch provided between the power source and the first series of the semiconductor switches is open in a stop mode of the vehicle, a signal is given to a control terminal of only the second series of the semiconductor switches to prevent a short circuit of a main battery.

Electric motor vehicle

An electric motor vehicle comprises as a drive system a battery, a motor, and a controller for controlling the rotation of the motor. The electric motor vehicle disposes an accelerator for controlling speed of the motor, a key switch for turning on or off the motor and the controller, a circuit for judging an opening/closing state of the accelerator when the key switch is turned on, and a circuit for preventing the rotation of the motor when the key switch is turned on with the accelerator open.

A control apparatus by which a duty ratio in consideration of how energy stored in storage cells is consumed is set to ensure a steady traveling feeling, a regeneration brake which can produce stable braking forces regardless of how storage cells are consumed, and a protective device by which a plurality of operation stop levels are set to be able to cancel the stop operation effected for the first time and to ensure reliable alarming, are provided. In the first and second embodiments, a chopper duty ratio is compensated depending on how storage cells are consumed, to provide a steady agreeable traveling feeling. In the third embodiment, regenerated electric power is consumed by a motor driving circuit to stabilize operation of a regeneration brake regardless of how storage cells are consumed, and improve performance thereof. In the fourth embodiment, in a protective device for determining an operating condition of equipment, issuing an alarm in the event of abnormality, and stopping operation of the equipment, the stop operation is effected in two steps and a cancel switch for canceling the stop operation in the first step is provided to, depending on the situation, cancel the stop operation effected by the protective device.

Traveling control apparatus for electric vehicles

A control apparatus by which a duty ratio in consideration of how energy stored in storage cells is consumed is set to ensure a steady traveling feeling, a regeneration brake which can produce stable braking forces regardless of how storage cells are consumed, and a protective device by which a plurality of operation stop levels are set to be able to cancel the stop operation effected for the first time and to ensure reliable alarming, are provided. In the first and second embodiments, a chopper duty ratio is compensated depending on how storage cells are consumed, to provide a steady agreeable traveling feeling. In the third embodiment, regenerated electric power is consumed by a motor driving circuit to stabilize operation of a regeneration brake regardless of how storage cells are consumed, and improve performance thereof. In the fourth embodiment, in a protective device for determing an operating condition of equipment, issuing an alarm in the event of abnormality, and stopping operation of the equipment, the stop operation is effected in two steps and a cancel switch for canceling the stop operation in the first step is provided to, depending on the situation, cancel the stop operation effected by the protective device.

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Suwa, Japan

Minoru Kozaki