Samsung Display Co., Ltd.

Minku Lee

Seunghee Lee

Jihyun Ka

Chulkyu Kang

Haijung In

Wonkyu Kwak

Soyoung Lee

Ji-Hyun Ka

Hai-Jung In

Junwon Choi

Dongsun Lee

Kwangsae Lee

Seonkyoon Mok

Jaesic Lee

Minkyu Woo

Soongi Kwon

Hyeongjun Jin

Yangwan Kim

Chul Kyu Kang

Jintae Jeong

Kimyeong Eom

Wonmi Hwang

Mihae Kim

Kyonghwan Oh

Minjeong Kim

Kyunghoon Kim

Hyun Ji Cha

Changwon Jeong

Hai-jung In

A display device includes: a display panel including pixels; a data driver configured to output data voltages to the pixels; a gate driver configured to output a write gate signal to write the data voltages to the pixels having an inactivation level in a frame stop period; a timing controller configured to control the data driver and the gate driver; and a voltage generator configured to apply a first bias voltage to first pixels to which the data voltages are written before the frame stop period among the pixels, and to apply a second bias voltage to second pixels to which the data voltages are written after the frame stop period among the pixels.

Display device

A stage of a gate driver includes: a first node controller and a second node controller. The first node controller includes a first control transistor connected between a first node and a second node, and the first control transistor includes a first gate and a second gate that are connected to a first voltage input terminal for receiving a first voltage of an on-voltage level. The second node controller includes a second control transistor connected between a third node and a second voltage input terminal for receiving a second voltage of an off-voltage level, and the second control transistor includes a first gate connected to the first node and a second gate connected to the second voltage input terminal.

Gate driver

A display device includes: a substrate including a display area, a peripheral area outside the display area, and a pad area in the peripheral area; a data line in the display area; and a first connection line in the display area and connected to the data line to transmit, to the data line, a signal from the pad area, wherein the first connection line includes a first portion in a first direction and a second portion bent from the first portion and in a second direction.

An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.

Emissive display device

A pixel includes a display element, a driving transistor, a storage capacitor, a scan transistor, and a gate control circuit. The display element may emit light for an emission period, wherein the display element includes an anode and a cathode. The driving transistor may control an amount of a driving current flowing through the display element, wherein the driving transistor includes a first gate and a second gate. The storage capacitor is electrically connected to the first gate of the driving transistor. The scan transistor may be turned on for a data-write period for transferring a data voltage to the driving transistor. The lower gate control circuit may electrically connect the second gate of the driving transistor to the anode of the display element for the emission period, and may apply a bias voltage to the second gate of the driving transistor for the data-write period.

Pixel and display apparatus

A light emitting display device includes: a light emitting diode at a display area, and including an anode and a cathode; a pixel circuit at the display area, and to transmit an output current to the anode of the light emitting diode; a repair line extending in a first direction; a repair pixel circuit connected to the repair line; a bridge including one end overlapping with the repair line; and a connecting portion connected to the anode, and including one end overlapping with the bridge. The bridge is not connected to the repair line, the connecting portion, and the anode.

Light emitting panel

A display panel includes an electrostatic protection circuit including a first protection circuit electrically connected between a first signal line and a second signal line. The first protection circuit includes a first transistor connected between the first signal line and the second signal line and including a gate electrode and a lower gate electrode, a first resistor connected between the gate electrode of the first transistor and the second signal line, a first capacitor connected between the gate electrode of the first transistor and the second signal line, and a second capacitor connected between the lower gate electrode of the first transistor and the second signal line. The lower gate electrode of the first transistor receives a reference voltage.

Display panel and display device including same

A pixel capable of adjusting a threshold voltage of a driving transistor, the pixel including: a display element configured to emit light during an emission period and including an anode and a cathode, the first transistor including an upper gate and a lower gate and configured to control a magnitude of a driving current flowing to the display element, a storage capacitor connected to the upper gate of the first transistor, and a second transistor configured to be turned on during a data writing period to transmit a data voltage to the first transistor, wherein a lower gate-source voltage of the first transistor has a first voltage level in the data writing period and a second voltage level in the emission period.

Pixel capable of adjusting a threshold voltage of a driving transistor

A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area.

Display panel

A display panel includes: a substrate including an opening area, a non-display area at least partially surrounding the opening area, and a display area; a plurality of first lines, each of which includes a first bypass portion along the opening area; a plurality of second lines, each of which includes a second bypass portion along the opening area; and a shield layer overlapping at least one first bypass portion. Each of the first lines includes a first or second conductive line in the non-display area. Each of the first and second conductive lines includes the first bypass portion. The first and second conductive lines are alternately arranged and are disposed on different layers. Each of the second lines includes a third conductive line in the non-display area. Each of the third conductive lines includes the second bypass portion, and at least partially overlaps the first or second conductive line.

Display panel with shielded signal lines routed around an opening area in the display panel

A display device includes: a first driving transistor including a first gate electrode and a first semiconductor layer including a first source region and a first drain region, the first driving transistor being in a first pixel area of a substrate; a second driving transistor including a second gate electrode and a second semiconductor layer including a second source region and a second drain region, the second driving transistor being in a second pixel area adjacent the first pixel area of the substrate; a first electrode layer overlapping at least a portion of the first source region of the first driving transistor; a second electrode layer overlapping at least a portion of the second source region of the second driving transistor; a first power line electrically connected to the first electrode layer; and a second power line electrically connected to the second electrode layer.

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Yongin-si, South Korea

Minku Lee