Lg Display Co., Ltd.

Minki Kim

Jinsung Kim

Hansun Park

Sul Lee

Juno Hur

Dongju Kim

Hayoung Ji

Jonghyun Park

Binn Kim

Euitae Kim

Soondong Cho

Hyeongjun Lim

TaeHan Park

KiSeob Shin

ChoongKeun Yoo

Hwanjoo Lee

Wooram Youn

Jincheol Hong

Choongkeun Yoo

Dongwook Choi

JinSung Kim

HyunTaek Nam

Gyeonghwan Kim

Junghoon Woo

SungChul Ha

Inho Yeo

Ockhee Kim

Jongkyun Lee

A display device A display device includes a display panel including a plurality of pixel rows and a plurality of pixel columns arranged to display an image; a data driver comprising a plurality of source drive integrated circuits (ICs) respectively connected to one or more pixel columns among the plurality of pixel columns and configured to supply a data signal to the plurality of pixel rows; and a timing controller configured to supply image data and a data control signal to the data driver, wherein the timing controller includes a general purpose input-output (GPIO) pin connected to digital block power down enable (DBDEN) pins provided in each of the plurality of source drive ICs in a point-to-multipoint way and outputs a DBDEN signal disabling to at least some of the plurality of source drive ICs.

Display device

Discussed is an electroluminescence display that can include a substrate; and a plurality of pixels on the substrate. Each pixel can include a first electrode, a light emission layer on the first electrode, and a second electrode on the light emission layer. Each pixel can also include a half transparent layer on the second electrode, and a color filter on the half transparent layer.

Top emission type electroluminescence display having micro-cavity structure

A display apparatus includes a substrate including a first subpixel and a second subpixel, a first electrode including a first sub-electrode provided in the first subpixel and a second sub-electrode provided in the second subpixel, the first electrode being provided on the substrate, an organic light emitting layer on the first electrode, a second electrode on the organic light emitting layer, a first bank between the first sub-electrode and the second sub-electrode, the first bank dividing the first subpixel and the second subpixel, a color filter layer on the second electrode, a reflective metal at a portion of the color filter layer, and a light absorbing part on an upper surface of the reflective metal, the light absorbing part absorbing light, wherein the first electrode is provided as a reflective electrode, and the organic light emitting layer is disposed between the reflective electrode and the reflective metal.

Display apparatus

A light emitting display apparatus is disclosed. The light emitting display apparatus includes: a substrate; and a plurality of pixels disposed on a pixel area on the substrate. Each of the plurality of pixels includes: a first circuit layer including a first pixel circuit including a driving transistor; a second circuit layer overlapping the first circuit layer, wherein the second circuit layer includes a second pixel circuit including a data supply transistor configured to supply a data signal to the first pixel circuit; a circuit insulating layer between the first circuit layer and the second circuit layer; and a light emitting diode layer including a light emitting diode electrically connected with the first pixel circuit.

Light emitting display apparatus

Disclosed is a display device including: a display panel; a timing controller generating image data corresponding to an input image, and generating and outputting a first start signal, an on clock, and an off clock; a level shifter generating a second start signal in synchronization with the first start signal, generating gate clocks that swing to a predetermined voltage and have multiple phases, by using the on clock and the off clock, and outputting the generated gate clocks; a shift register including multiple stages connected to gate lines of the display panel, respectively, and outputting a scan signal sequentially to the gate lines by using the second start signal and the gate clocks; and a data driving circuit supplying a data voltage corresponding to the image data to data lines of the display panel in synchronization with the scan signal.

The present disclosure relates to a display apparatus for generating data voltages which are to be output to pixels included in second virtual horizontal lines, based on pieces of image data corresponding to first virtual horizontal lines.

An electroluminescent display device includes: a substrate, a first subpixel on the substrate, a second subpixel on the substrate, a third subpixel on the substrate, a respective first electrode in each of the first to third subpixels, an emission layer on the first electrodes, a common second electrode on the emission layer, an encapsulation layer including: a first encapsulation layer on the second electrode, and a second encapsulation layer on the first encapsulation layer, and a first semi-transmissive layer between the first encapsulation layer and the second encapsulation layer, the first semi-transmissive layer overlapping the first electrode of the first subpixel.

Electroluminescent display device

A transparent display panel and a transparent display device including the same, including a plurality of data lines, a plurality of gate lines, and a plurality of pixel regions disposed in a matrix. The pixel region is configured by a plurality of sub pixels and includes transmission areas, circuit areas, and a plurality of emission areas which overlap with a part of the transmission areas and the circuit areas.

Transparent display panel and transparent display device including the same

A display device includes a source unit; and a sink unit connected with the source unit via an embedded display port interface for signal transmission between the source and sink units and to enable a panel self refresh (PSR) mode for reducing power, wherein, for an input still image, the source unit applies power to a frame buffer of the sink unit and transmits the still image to the sink unit, wherein the sink unit determines whether the still image can be losslessly compressed and stored in the frame buffer, outputs a first control signal if the still image can be losslessly compressed and stored in the frame buffer, and outputs a second control signal if the still image cannot be losslessly compressed and stored, and wherein the source unit activates the PSR mode for the first control signal, and deactivates the PSR mode for the second control signal.

Display device and method for controlling panel self refresh operation thereof

A liquid crystal display is disclosed. The liquid crystal display includes a power module, which senses an input voltage and outputs a mode conversion signal when the input voltage is equal to or less than a reference voltage, and a timing controller which changes a driving mode of a source driver integrated circuit (IC) in response to receiving the mode conversion signal from the power module.

Liquid crystal display and method for driving the same

A display device includes a display panel having a plurality of gate lines and a plurality of data lines crossing each other and pixels formed at intersections thereof; a gate driving circuit that generates a gate pulse based on a gate power voltage and applies the gate pulse to the gate lines; a data driving circuit that divides the data power voltage to convert input digital video data into an analog data voltage and applies the data voltage to the data lines; a power voltage control circuit that detects an input frame frequency and generates a different power control signal in accordance with the detected frame frequency; and a power voltage adjusting circuit that adjusts at least one of the gate power voltage and the data power voltage differently from a predetermined reference level in response to the power control signal.

Display device and method to control driving voltages based on changes in display image frame frequency

A flat panel display is provided. In particular, a flat panel display including a driving circuit in which a timing controller and a data driver for driving a panel are mounted in a single IC, and a driving circuit thereof are provided. The flat panel display includes a display panel having a plurality of pixels, a gate driver controlling the plurality of pixels, and a plurality of driving circuits processing and converting an image signal and outputting the same to a display panel in a normal mode. The driving circuits generate a black image signal according to a synchronization signal.

Display apparatus that generates black image signal in synchronization with the driver IC whose internal clock has the highest frequency when image/timing signals are not received

Provided are an organic light emitting display device and a method for manufacturing the same. The organic light emitting display device comprises at least a first pixel area and a second pixel area. A partition is disposed between the first pixel area and the second pixel area. An auxiliary electrode is disposed between the first pixel area and the second pixel area and over the partition. Additionally, a first conductive element is disposed over the first pixel area, the second pixel area, and the auxiliary electrode and the first conductive element is electrically connected to the auxiliary electrode.

Organic light emitting display device and method for manufacturing the same

The present invention provides a LCD device including: a timing control unit; an oscillator which is included in the timing control unit and generates a clock frequency; a frequency divider which is included in the timing control unit and reduces the clock frequency supplied from the oscillator by dividing the clock frequency by at least 2; and a mode selection part which is included in the timing control unit and changes at least one driving mode of internal logic circuits by using the divided clock frequency supplied from the frequency divider.

Liquid crystal display device and driving method for changing driving mode thereof

A liquid crystal display includes a liquid crystal display panel having a pixel array including a first group of liquid crystal cells connected to odd-numbered gate lines and a second group of liquid crystal cells connected to even-numbered gate lines and a data driving circuit including a latch array. Each liquid crystal cell of the second group shares a data line with one liquid crystal cell of the first group adjacent to the liquid crystal cell of the second group in an extension direction of the gate lines. The latch array delays only second group data to be applied to the liquid crystal cells of the second group among digital video data for one horizontal line by about one half horizontal period in response to a data rendering control signal.

Growing community of inventors

Paju-si, South Korea

Minki Kim