Samsung Electronics Co., Ltd.

Minhwan An

Chul-Hwan Choo

Yunseok Yang

Eungchang Lee

Yunkyeong Jeong

Jin Suk Chung

Seula Ryu

Jaewoo Shin

A memory device includes a first physical interface, a second physical interface, a first memory core, a second memory core, and a setting circuit. The first memory core is assigned to the first physical interface and includes a plurality of first stacked memory dies and connected via a through electrode. The second memory core is assigned to the second physical interface and includes a plurality of second stacked memory dies connected via a through electrode. The setting circuit sets at least one physical interface to be used for connection with an external device of the memory device among the first physical interface and the second physical interface.

Method to select phys and a configuration of the data path in a multi PHY DRAM

A memory device includes a base die that includes a data signal bump configured to receive a data signal, a first memory stack that includes first memory dies sequentially stacked on the base die, and a second memory stack that includes second memory dies sequentially stacked on the base die and spaced from the first memory stack in a direction parallel to an upper surface of the base die. The base die is configured to selectively provide the data signal received through the data signal bump to one of the first memory stack or the second memory stack based on a selection signal.

Memory device and system device including the same

Growing community of inventors

Suwon-si, South Korea

Minhwan An