Samsung Electronics Co., Ltd.

3e Co. Ltd.

MinHo Kim

Eun Chu Oh

Kyungsoo Kim

Junyeong Seok

Younggul Song

Byungchul Jang

Hyunmook Choi

A non-volatile memory device includes a substrate, a stack structure that includes a first gate layer that extends in a horizontal direction and a second gate layer that extends in the horizontal direction and is disposed apart from the first gate layer in a vertical direction, a plurality of first channel structures that penetrate in the vertical direction through a first channel region of the stack structure, a plurality of second channel structures that penetrate in the vertical direction through a second channel region of the stack structure, a first anti-fuse structure and a second anti-fuse structure that each penetrate in the vertical direction through an anti-fuse region of the stack structure, a first anti-fuse transistor that is electrically connected to the first gate layer through the first anti-fuse structure, and a second anti-fuse transistor that is electrically connected to the second gate layer through the second anti-fuse structure.

Non-volatile memory device and method of manufacturing the same

A storage device includes a first semiconductor structure having a first cell area, with memory cells disposed on a first semiconductor substrate, and a first metal pad disposed above the first cell area. A second semiconductor structure has a peripheral circuit area on a second semiconductor substrate and on which peripheral circuits are disposed, a second cell area including a plurality of second memory cells, and a second metal pad bonded to the first metal pad. A third semiconductor structure includes a memory controller disposed on a third semiconductor substrate and connected to a third metal pad through a connection via penetrating through the third semiconductor substrate. A connection structure penetrates through the second semiconductor substrate and connects the memory controller to the second semiconductor structure. The memory controller controls the first and second cell areas based on a signal applied from a host through the third metal pad.

Storage device, storage system, and operation method of storage device

A nonvolatile memory device includes a memory cell region and a peripheral circuit region disposed below the memory cell region. The peripheral circuits include a page buffer, a row decoder, and other peripheral circuits, wherein the page buffer is included in a page buffer block disposed on a lower surface of the first semiconductor substrate to be distinguished from other circuits included in the peripheral circuit region in a first direction perpendicular to an upper surface of the first semiconductor substrate, is connected to the memory cell region through a connection portion penetrating through the first semiconductor substrate, and includes a plurality of vertical transistors each defined by a source region, a channel region, and a drain region stacked in sequence in the first direction.

Nonvolatile memory device and storage device

Receiving an iris image; detecting, among rows of the iris image, rows in each of which a number of consecutive pixels each having a brightness value above a first threshold value is larger than a second threshold value; detecting, among columns of the iris image, columns in each of which a number of consecutive pixels each having a brightness value above the first threshold value is larger than the second threshold value; selecting, among the detected rows, consecutive rows in a vertical direction whose number is larger than a third threshold; selecting, among the detected columns, consecutive columns in a horizontal direction whose number is larger than the third threshold and determining a set of the pixels as a glint if the set of pixels included in the selected rows and the selected columns and each having the brightness value above the first threshold has a predetermined shape.

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Seongnam-si, South Korea

MinHo Kim