Motorola Corporation

Freescale Semiconductor,inc.

Minh Hoang

Manickam R Sridhar

Sepehr Mehrabanzad

John Wortman, Jr

Timothy A Lis

Rajat Mitra

A DMA controller has both a receiving portion and a sending portion and may be used in a modem or other data transmission context. The DMA controller is intended to provide to or receive from data samples on a bus that may or may not be available. For the case when the bus is available, samples of data are either sent to or received from proper memory locations. When the bus is not available, the number of the samples that are missed due to the bus not being available is stored. This count is then used to ensure that the samples that are provided or received when the bus becomes available are stored in or read from the proper location to provide the samples at the proper time. The locations in which the samples were lost are provided with predetermined values.

DMA controller

A method and apparatus is provided for providing an automated selection of a telecommunication service from among multiple telecommunication services. In a telecommunication system ( ) that includes multiple communication devices ( ) and a telecommunication infrastructure ( ) including multiple local exchange offices ( ), multiple communication channels ( ), and multiple telecommunication services, a subscriber to the services of the telecommunication system is able to select a particular telecommunication service by transmitting a service request code via the subscriber's communication device, which service request code corresponds to a request for a telecommunication service. The telecommunication infrastructure then enables or disables the requested telecommunication service in response to receiving the request.

Method and apparatus for providing an automated selection of a telecommunication service from among a plurality of telecommunication services

A method and apparatus for achieving the fastest possible data transmission rate, symmetric, near symmetric, or a specific data transmission rate between multiple analog modems. The invention comprises a multimedia unit comprising of two (or more) digital modems and a controller section. The controller provides the interface between the two (or more) digital modems. When a user attempts to send data from a first analog modem to a second analog modem, the user calls the first digital modem in the network. Next, the first digital modem establishes a connection with the second digital modem through the controller section which is partitioned in two segments. Controller segments may be co-located or located in different locations and connected through either Internet or PSTN. Then, the second digital modem dials up the second analog modem under direction of the controller. Subsequently, the controller commands the digital modems to establish a connection at the fastest possible symmetric rate, near-symmetric, or any other pre-configured rate. Last, the controller bridges traffic between the digital modems and enables the two analog modems to communicate transparently.

High speed dial-up service using PCM modem technology

A software implementation of a modem, particularly designed to execute on a general purpose host processor, controlled by a non-real-time, multi-tasking operating system (OS), such as the Windows 95 OS. The software modem is scaleable and portable. In this fashion, communication protocols (particularly datapumps) may be easily added to, or removed from, the system, and the modem may be easily adapted for use on other types of processors and operating systems. The controller and datapump portions execute as a plurality of interacting subsystems, each of which can execute at at least one of several priority levels. A HRT level routine is responsible for handling an ASIC that buffers transmit and receive samples destined to and received from the phone lines. A SRT level task includes logic that needs time functionality, but which is not time-critical like the HRT logic. BRT routines execute in an event-driven basis and are used for many controller functions.

Modem implemented in software for operation on a general purpose

An apparatus (101) and method for interfacing between a processor (103) and a communications channel (105), the processor operable in data terminal equipment (102) such as a computer having a communications application program, to provide for data transmission and reception over a communications channel (105), utilizing the computer processor without additional or redundant microprocessor or digital signal processor components. The apparatus and method provide for data transfer between the interface apparatus (101 ) and the communications channel (105) at a first, determinate frequency corresponding to a specific data transmission rate. The apparatus and method provide for data transfer between the interface apparatus (101) and the processor (103) at a second, indeterminate frequency, and provides for interim data storage in memory (115) between data transmission (or data reception) and data processing, such as modulation and demodulation, by the computer processor (103). The apparatus and method further provide for generating an interrupt signal to the processor to indicate the presence of received data for processing and the absence of digital data for transmission.

Apparatus and method for interfacing between a communications channel

An apparatus (101) and method for interfacing between a processor (103) and a communications channel (105), the processor operable in data terminal equipment (102) such as a computer having a communications application program, to provide for data transmission and reception over a communications channel (105), utilizing the computer processor without additional or redundant microprocessor or digital signal processor components. The apparatus and method provide for data transfer between the interface apparatus (101) and the communications channel (105) at a first, determinate frequency corresponding to a specific data transmission rate. The apparatus and method provide for data transfer between the interface apparatus (101) and the processor (103) at a second, indeterminate frequency, and provides for interim data storage in memory (115) between data transmission (or data reception) and data processing, such as modulation and demodulation, by the computer processor (103). The apparatus and method further provide for generating an interrupt signal to the processor to indicate the presence of received data for processing and the absence of digital data for transmission.

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Stoughton, MA, United States of America

Minh Hoang