Samsung Electronics Co., Ltd.

Minguk Kang

Jihyung Kim

Jeong Hoon Ahn

Shaofeng Ding

Yun Ki Choi

JaeHee Oh

Jeonghoon Ahn

Yunki Choi

Wonji Park

Haeri Yoo

A semiconductor device includes a substrate including a logic cell region and a connection region, a dummy transistor on the connection region, an intermediate connection layer on the dummy transistor, a first metal layer on the intermediate connection layer, an etch stop layer between the intermediate connection layer and the first metal layer, a through contact below the first metal layer penetrating the connection region, an upper portion of the through contact protruding above the etch stop layer, and a protection insulating pattern on the etch stop layer covering the upper portion of the through contact. The protection insulating pattern covers an upper side surface of the through contact and a top surface of the through contact.

Semiconductor device and stacked semiconductor chips including through contacts

A method of estimating warpage of an interposer and a method of manufacturing a semiconductor package by using the same are disclosed. The interposer includes a through electrode passing through a substrate, and a plurality of metal wiring layers and a plurality of insulating layers on the substrate, and the method of estimating warpage of an interposer includes: performing a temperature sweep test by using sample interposers, and measuring warpages according to temperatures; deriving a warpage slope, as a function of temperature, of each of the sample interposers; deriving a warpage model by linearly fitting the warpage slope with respect to an average pattern density of metal wiring layers in each of the sample interposers; and calculating a room temperature warpage reference value of the interposer based on the warpage model.

Methods of estimating warpage of interposers and methods of manufacturing semiconductor package by using the same

Growing community of inventors

Busan, South Korea

Minguk Kang