Telefonaktiebolaget Lm Ericsson (publ)

Optis Cellular Technology, LLC

Mingquan Bao

Yinggang Li

David Gustafsson

Harald Jacobsson

Kristoffer Andersson

Sven Erik Mattisson

Per Ligander

Thomas Ove Emanuelsson

Thomas Lewin

Per Ingelhag

Yu Su

Herbert Zirath

Bing Zhang

Björn Albinsson

The present disclosure relates to a balun arrangement () comprising a slot () at least partially having a crossing slot width (ws, hs) running between a first longitudinal side () and a second longitudinal side () in at least a first metallization layer (). The balun arrangement () further comprises an unbalanced first port (P) that is defined between a first connection () to the second side () of the slot () and a fourth connection () to the first side () of the slot () and a balanced second port (P) that is that is defined between a second connection () to the second side () of the slot () and a fifth connection () to the first side () of the slot (). The balun arrangement () also comprises a balanced third port (P) that is defined between a third connection () to the first side () of the slot () and a sixth connection () to the second side () of the slot ().

Wideband balun arrangement

There is provided a power amplifier arrangement for amplifying an input power signal to an output power signal. The power amplifier arrangement comprises a main amplifier having an input and an output. The power amplifier arrangement comprises at least one auxiliary amplifier, each having an input and an output. The power amplifier arrangement comprises a power divider having an input and outputs. The input of the power divider is configured to receive the input power signal. Each output of the power divider is connected to a respective input of the power amplifiers. The power amplifier arrangement comprises a Doherty combiner comprising at least one Ruthroff transformer and configured to combine all the outputs of the power amplifiers to, at an output of the Doherty combiner, produce the output power signal.

Power amplifier arrangement comprising Ruthroff transformer

The embodiments herein relate to a power amplifier arrangement () comprising a main amplifier () comprising an output connected to a first terminal () of a primary winding () of a transformer (). A second terminal () of the primary winding () is connected to ground (). The power amplifier arrangement () comprises an auxiliary amplifier () comprising an output connected to a first terminal () of a secondary winding () of the transformer (). A second terminal () of the secondary winding () is connected to a load ().

Power amplifier arrangement

Frequency multipliers () for generating a differential output signal from a single-ended input signal are disclosed. The frequency multiplier comprises a single-ended input (P(f)) to receive the input signal with a frequency of fand differential outputs (+/−P(2nf)) to provide the differential output signals. The frequency multiplier further comprises a first signal branch () connected to the single-ended input and one of the differential outputs (+P(2nf)). The first signal branch comprises a first low pass or bandpass filter with a center frequency of f(L/BPF), a first nonlinear component (NC) and a first high pass or bandpass filter with a center frequency of 2nf(H/BPF). The frequency multiplier further comprises a second signal branch connected to the single-end input and another one of the differential outputs (−P(2nf)). The second signal branch comprises a second low pass or bandpass filter with a center frequency of f(L/BPF), a second nonlinear component (NC) and a second high pass or bandpass filter with a center frequency of 2nf(H/BPF). The first and second nonlinear components are configured such that even-order harmonics generated in the first and second nonlinear components are in anti-phase, thereby the differential output signals with a frequency of 2n times the frequency of the input signal are generated at the differential output, where n is an integer number.

Frequency multiplier with balun function

A power amplifier has a number n of power cells A, a number n of output transmission lines TLfor combining output powers from the power cells, and a number n of impedance transformation network ITN, where i=1, . . . n. The number n of output transmission lines are connected in series. The output terminal of each power cells is connected to its output transmission line via its impedance transformation network. Each impedance transformation network is an upward impedance transformation network for transforming an output impedance of each power cell at the input terminal of the impedance transformation network into a higher impedance at the output terminal of the impedance transformation network. A number n of input transmission lines TL(i=1, 2 . . . n)=connected in series. The input terminal of the i-th power cell is connected to the second terminal of the i-th transmission line via a capacitor, where i=1, . . . n.

Power amplifier with large output power

The present disclosure relates to an amplifier arrangement comprising a first amplifier, a second amplifier and an output combiner arranged to combine respective output signals of the first amplifier and the second amplifier into an output signal of the amplifier arrangement. An amplifier arrangement input signal is arranged as input signal to the first amplifier, and a difference signal, representing a difference between the amplifier arrangement input signal and a scaled output signal of the first amplifier, is arranged as input to the second amplifier. The output combiner is arranged to modulate the loads of the first amplifier and the second amplifier in dependence of the output signal of the second amplifier.

Doherty amplifier arrangement

A frequency multiplier () generates an output signal with a frequency 3 times of the input signal frequency. The frequency multiplier () comprises four cascaded stages. A first stage () is configured to receive an input signal and generate harmonics signals of the input signal. A second stage () is a passive filter, a frequency response of the passive filter has either a peak or a dip around an upper frequency end of a frequency band of the input signal. A third stage () is configured to mix the 1st and the 2nd order harmonics signals to generate 3rd order harmonic signals. A fourth stage () is configured to suppress the 1st and even-order harmonics signals and output a signal dominated with a frequency 3 times of the input signal frequency.

Broadband frequency tripler

An active antenna () comprising a driving loop with first () and second () sections, each of which extends between end points. Each end point of each section () is connected to the closest end point of the other section by a reflection amplifier (). One reflection amplifier () comprises differential ports for signals to/from the active antenna. The active antenna also comprises a passive loop with first () and second () sections, each of which extends between end points. Each end point of each section () is connected to the closest end point of the other section by a reflection amplifier (). The driving loop and the passive loop extend in parallel to each other and the first and the second section () of each of the loops form separated complementary parts of a closed geometrical shape and are built in open waveguide technology.

Active antenna

A sub-harmonic mixer two or more cascaded stages for converting a Radio Frequency signal to an Intermediate Frequency signal. Each stage comprises a common-emitter transistor or a common-source transistor and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor. An Alternating Current choke is coupled at a collector or drain of each transistor. An LO input is coupled to the input of a first stage of the two or more stages; an RF input is coupled to the output of the first stage of the two or more stages; and an IF output is coupled to the output of a last stage of the two or more stages.

Sub-harmonic mixer and a method therein for converting radio frequency signals to intermediate frequency signals

A power detector comprising a first and a second bipolar junction/FET transistor. The first transistor is arranged as a common base/gate transistor with its base/gate being biased by a bias voltage and the second transistor is arranged as a common emitter/source transistor with its emitter/source being grounded. The power detector also comprises a diode or current source connected to ground from the emitter/source of the first transistor, in which power detector an input port is connected to the emitter of the first transistor and to the base/gate of the second transistor, and an output port is connected to the collectors/drains of the first and second transistor, said collectors/drains also being connected to a DC supply via a first resistor.

Power detector

A sub-harmonic mixer comprising first and second input ports, and an output port, and arranged to output products of signals applied at the input ports. The sub-harmonic mixer comprises a first stage a second stage arranged in series with each other, with the input ports of the sub-harmonic mixer being input ports of the first stage, and the output port of the sub-harmonic mixer being an output port of the second stage. An output port of the first stage is connected to an input port of the second stage. The first stage is arranged to generate a fundamental product and a first third order intermodulation distortion product in-phase with each other. The second stage is arranged to generate a second third order intermodulation distortion product in anti-phase to the fundamental product generated by the second stage.

Sub-harmonic mixer

A negative group delay circuit comprising a negative group delay component, also comprising a circulator with three ports, further comprising a first resonator, with the negative group delay component arranged between an input port of the negative group delay circuit and a first port in the circulator. The first resonator is arranged between a second port of the circulator and a first reflection amplifier, so that signals reflected from the first reflection amplifier to the second port of the circulator through the first resonator are emitted at the third port of the circulator. The third port is arranged to be used as an output port of the negative group delay circuit.

Device for negative group delay

A quadrature hybrid comprising first and second coupled open waveguides. Each open waveguide comprises first and second ports. One port in the first open waveguide is used as input port for an input signal which is used to generate I and Q output signals. The other port in the first open waveguide is used to output the Q signal, and one of the ports in the second waveguide is used to output the I signal. The other of the ports in the second open waveguide is an isolated port. The quadrature hybrid comprises a first differential amplifier with positive and negative ports, the positive port being connected to the first open waveguide and the negative port being connected to the second open waveguide.

Quadrature hybrid

An oscillator circuit () comprising a resonator () connected serially with a series to series feedback amplifier (), in which the series to series amplifier comprises a feedback network () which has an impedance value which is below a certain first predefined limit and a phase value which increases with the operational frequency of the oscillator circuit with a rate which is above a second predefined limit. In one embodiment, the impedance value of the feedback network () also varies with the operational frequency of the oscillator circuit, but is always below said first predefined value within the operational frequency of the oscillator circuit.

Oscillator circuit

A dual mode filter () comprising an input (Pin) and an output port (Pout) and a non-conducting substrate (), and first () and second () conductors which connect the input port to the output port. The conductors are arranged on or in the substrate, and the first conductor is longer than the second conductor by 50%. Either the first or the second conductor comprises a perturbation element () at a central position. The first conductor is arranged between the input port and the output port with a number of sections (----), at least some of which are parallel to each other, and arranged so that the current in a section which has one or more other sections in parallel to it always flows in the same direction as the current in the most adjacent of said other sections.

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