Au Optronics Corporation

Asia Pacific Microsystems, Inc.

Ming-Yan Chen

Yi-Wei Chen

Yi-Sheng Cheng

Ying-Chi Liao

Ming-Hsien Lee

Che-Chia Chang

Kun-Hong Chen

Chen-Yueh Li

Jiunn-Yi Lin

A transistor device disposed on a substrate and including a semiconductor layer, a first gate, a second gate, and two source drain electrodes is provided. The semiconductor layer is disposed on the substrate and has a channel region, two lightly-doped regions, and two source drain regions. Each of the two lightly-doped regions has a first boundary adjoined to the channel region and a second boundary adjoined to one of the two source drain regions. The first gate is extended over the channel region of the semiconductor layer, wherein an edge of the first gate is aligned with the first boundary. The second gate is stacked on the first gate and is in contact with the first gate, wherein in a thickness direction, the second gate is overlapped with the two lightly-doped regions. The two source drain electrodes are respectively in contact with the two source drain regions.

Transistor device

A diaphragm piezoresistive pressure sensor includes: a base member; a diaphragm including a middle portion and a surrounding portion surrounding the middle portion; a spacer disposed between and cooperating with the base member and the diaphragm to define a cavity thereamong; an inner abutment member disposed in the cavity and spaced apart from the base member by a clearance; and a piezoresistive sensor unit embedded in the diaphragm. The spacer surrounds and is spaced apart from the inner abutment member. At least one of the inner abutment member and the middle portion of the diaphragm defines a chamber therebetween.

Diaphragm piezoresistive pressure sensor

An organic light emitting diode (OLED) display panel and a method of forming a polysilicon channel layer thereof are provided. In the method, firstly, a substrate having a polysilicon layer disposed thereon is provided. Then, a dopant atom not selected from the IIIA group and the VA group is doped inside the polysilicon layer to form a polysilicon channel layer.

Organic light emitting diode (OLED) display panel and method of forming polysilicon channel layer thereof

A fabrication method of a pixel structure includes providing a substrate. A semiconductor layer and a first conductive layer are formed on the substrate in sequence and patterned to form a semiconductor pattern and a data line pattern. A gate insulation layer and a second conductive layer are formed on the substrate in sequence and patterned to form a gate pattern and a scan line pattern connected to each other. A source region, a drain region, a channel region, and a lightly doped region are formed in the semiconductor pattern. A third conductive layer formed on the substrate is patterned to form a source pattern and a drain pattern. A protective layer is formed on the substrate and patterned to form a contact window to expose the drain pattern. A pixel electrode electrically connected to the drain pattern through the contact window is formed on the protective layer.

Fabrication method of pixel structure

A pixel structure and a fabrication method thereof are provided, wherein a semiconductor pattern and a data line are defined simultaneously by performing a half-tone or grey-tone masking process. In addition, a self-alignment manner is further adopted to fabricate a lightly doped region with symmetric lengths on two sides of a channel region through steps such as photoresist ashing and etching, so as to prevent the problem of misalignment of mask generated when a mask is used to define the lightly doped region in the conventional art. Furthermore, a source pattern and a drain pattern are made to directly contact a source region and a drain region of the semiconductor pattern, such that a process of fabricating a via is omitted. Besides, in the present invention, a common line pattern surrounding the peripheral of the pixel region is also formed to improve the aperture ratio of the pixel structure.

Pixel structure

A semiconductor device and a manufacturing method thereof are provided. The manufacturing method can form a structure of a thin film transistor (TFT) having a symmetric lightly doped region, and thus provide superior operation reliability and electrical performance. In addition, the manufacturing method forms gate patterns of different TFTs by the same mask process and thereby avoids the misalignment of masks so as to improve the processing yield and reduce the manufacturing cost.

Semiconductor device and manufacturing method thereof

A method of forming a CMOS transistor on a substrate is provided, wherein the method requires only two implanting procedures to form all source/drain and light doped region. First, the source/drain of an NMOS transistor is formed by using a photoresist layer which covers up the source/drain of a PMOS transistor as a mask with a phosphorus dopant being implanted into. Next, the lightly doped region of an NMOS transistor and the source/drain of a PMOS transistor are formed by using a photoresist layer which covers up the source/drain of an NMOS transistor as well as the gate as masks with a boron dopant being implanted into. Of which, the dosage of the boron dopant is smaller than that of the phosphorus dopant.

Growing community of inventors

Hsinchu, Taiwan

Ming-Yan Chen