Infineon Technologies Ag

Ming Xue

Chow York Lee

Mohamed Rafi

Teck Hui Wong

Giji Hervias Juele

Weng Yew Kok

Nam Teck Shannon Teo

Franz Schoenberger

Johann Koelz

A system includes an inert gas supply, a soak chamber, a test chamber, a transfer zone, and a heater. The soak chamber soaks an integrated circuit (IC) device in the inert gas prior to testing. The test chamber includes contact pins for testing the IC device in the inert gas by contacting the contact pins to leads of the IC device. The transfer zone is to transfer the IC device from the soak chamber to the test chamber. The heater heats the inert gas supplied to the soak chamber and the test chamber.

Integrated circuit device testing in an inert gas

A test apparatus includes a multi-channel probe plate having an electrically insulating body with opposing first and second main surfaces, and a plurality of spaced apart electrically conductive coupling regions embedded in or attached to the body at the first main surface. Each of the electrically conductive coupling regions is configured to cover a different zone of a semiconductor package when the semiconductor package is positioned in close proximity to the first main surface of the plate. The test apparatus further includes circuitry electrically connected to each of the coupling regions of the probe plate via a different channel. The circuitry is operable to measure a parameter indicative of the degree of capacitive coupling between each electrically conductive coupling region of the probe plate and the zone of the semiconductor package covered by the corresponding electrically conductive coupling region.

Multi-channel probe plate for semiconductor package test systems

A system and a method for capacitive testing a component (including a packaged component) are disclosed. An embodiment of a test head comprises a holding unit configured to pick-up, hold and release the component, an electrode configured to receive a capacitive signal from the component and a preamplifier configured to amplify the capacitive signal.

Capacitive test device and method for capacitive testing a component

A multi-channel probe plate includes an electrically insulating body with opposing first and second main surfaces, and a plurality of spaced apart electrically conductive coupling regions embedded in or attached to the body at the first main surface. Each of the coupling regions covers a different zone of a semiconductor package when the package is positioned in close proximity to the first main surface of the plate. Circuitry electrically connected to each of the coupling regions of the probe plate via a different channel is operable to: measure a parameter indicative of the degree of capacitive coupling between each coupling region of the probe plate and the zone of the semiconductor package covered by the corresponding coupling region; provide a capacitance signal based on the parameter measured for each of the coupling regions of the probe plate; and select different ones of the capacitance signals for analysis.

Capacitive test method, apparatus and system for semiconductor packages

A measuring device is provided, the measuring device including: a power supply to provide electric power to a chip via at least one of a chip connection and a chip-carrier connection; a chip arrangement receiving portion configured to receive a chip arrangement, the chip arrangement including a chip and a plurality of chip-to-chip-carrier connections; a detection portion including: a plate; a detection circuit coupled to the plate and configured to detect an electrical signal from the plate; wherein the plate is configured such that it covers at least part of the chip arrangement; and wherein at least one chip-carrier connection is in electrical connection with the plate.

Measuring device and a method for measuring a chip-to-chip-carrier connection

A measuring device is provided: the measuring device including: a power supply configured to provide electric power to a chip via at least one of a chip connection and a chip-carrier connection; a chip arrangement receiving portion configured to receive a chip arrangement, the chip arrangement including a chip and a chip-carrier connected to the chip via one or more chip-to-chip-carrier connections; a detection portion including a plate; a detection circuit coupled to the plate and configured to detect an electrical signal from the plate; wherein the plate is configured such that it covers at least part of at least one of the chip, the chip-carrier, and the chip-to-chip-carrier connection; and wherein the plate is further configured such that at least part of the at least one of the chip, the chip-carrier, and the chip-to-chip-carrier connection is uncovered by the plate.

Growing community of inventors

Singapore, Singapore

Ming Xue