Au Optronics Corporation

Ming-Tien Lin

Sheng-Chao Liu

Ching-Huan Lin

Hsiang-Lin Lin

Kuang-Hsiang Liu

Chen-Ming Chen

Szu-Chieh Chen

Pin-Wei Wu

A pixel array including a plurality of scan lines and a plurality of data lines disposed crossing the scan lines to define a plurality of sub-pixel regions; at least a controlling structure, disposed in one of the sub-pixel regions and electrically connected to one of the scan lines and data lines; a plurality of sensing signal lines disposed parallel with the data lines and crossing the scan lines to define a plurality of regions having at least one first sub-region and second sub-region; at least one sensing-signal readout device disposed in the first sub-region and electrically connected with one of the scan lines and sensing signal lines; and at least one first sensing pad disposed in the second sub-region and electrically connected to the sensing-signal readout device in the second sub-region. The numbers of the sensing-signal readout devices electrically connected to the respective scan lines are the same.

Pixel array and display panel having the same

A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.

Pixel structure of a display panel

A discharging device is used to reduce the voltage level at a bootstrap point in an electronic circuit such as a shift register circuit. In such a circuit, a first transistor in a conducting state receives an input pulse and conveys it to the gate terminal of a second transistor, causing the second transistor to be in a conducting state. This gate terminal is known as a bootstrap point. After receiving the input pulse, an output pulse is produced at one drain/source terminal of the second transistor. During the time period of the output pulse, the first transistor is in a non-conducting state and the voltage level at the bootstrap point is high, imposing a stress upon the first transistor. A discharging circuit consisting of at least one transistor is coupled to the bootstrap point in order to reduce the voltage level at the output pulse period.

Method and device for reducing voltage stress at bootstrap point in electronic circuits

Growing community of inventors

Hsinchu, Taiwan

Ming-Tien Lin