Texas Instruments Corporation

California Institute of Technology

Arizona State University

Ming Sun

Jeffrey Anthony Morroni

Bertan Bakkaloglu

Rida Shawky Assaad

Philippe C Adell

An autozeroed comparator controls a frequency fof the input voltage inputted to a DC/DC converter. A digital frequency synchronization circuit is connected to the autozeroed comparator so as to form a phase locked loop, wherein the DES circuit controls the hysteretic window of the autozeroed comparator so as to lock fto a clock reference frequency. A plurality of slave phase circuits may be connected to the master phase circuit including the DFS circuit and the autozeroed comparator. Duty cycle calibration circuits adjust a duty cycle signal applied to each of the slave phase circuits, in response to average current measured in the slave phase circuits, so that each slave phase circuit is synchronized with the master phase circuit. A 6 A 90.5% peak efficiency 4-phase hysteretic quasi-current-mode buck converter is provided with constant frequency and maximum &#xb1;1.5% current mismatch between the slave phases and the master phase.

Digital multiphase hysteretic point-of-load DC/DC converter

A power converter includes a high side device, a low side device connected to the high side device at a switch node, an inductor connected to the high side device and the low side device at the switch node, and a high side driver. The high side driver is configured to drive a gate of the high side device at a first current for a first period of time. In response to the first period of time ending, the high side driver is configured to step down the first current for a second period of time. In response to the second period of time ending, the high side driver is configured to drive the gate of the high side device at the first current.

Adaptive high-side gate drive for ringing mitigation in switching power converters

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Tempe, AZ, United States of America

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