Monolithic Power Systems, Inc.

Ming Lu

Pengjie Lai

Jian Jiang

Bo Zhou

A power management integrated circuit (PMIC) chip provides power loss protection to an application device. The PMIC chip has several storage pins that each receives a set of storage capacitors that are charged using power from a power source during normal operation. An application device receives power from the power source during normal operation and receives power from an operational set of storage capacitors during power loss. A failing set of storage capacitors is disconnected from an operational set of storage capacitors and from the PMIC chip. The operational set of storage capacitors remains connected to the PMIC chip to provide power loss protection.

Power loss prevention circuit with mitigation for failed energy storage banks

A power supply having at least one PMIC provides flexible control to the power manage systems. The PMIC has an enable pin configured to receive a control signal, and a clock pin configured to generate and/or receive a series of clock pulses, so as to facilitate the operation of the PMIC.

Power supply with flexible control and the method thereof

A power supply covering both power sharing and power backup functions run in a more efficient and flexible way. The power supply adopts a power sharing converter coupled between a first bus terminal and a second bus terminal, so that if one of the bus terminals provides insufficient power, the other bus terminal kicks in by way of the power sharing converter to provide power support. In addition, a storage capacitor may also kick in to provide power support if one of the bus terminals provide insufficient power via or not via the power sharing converter.

Power supply and power supplying method with power backup

A power supply covering power sharing and overshoot preventing functions. In the power supply, a first eFuse is used to deliver a first input power source to a first load at a first bus terminal, and a second eFuse is used to deliver a second input power source to a second load at a second bus terminal. When the current flowing through one eFuse hits its current limit threshold, the other input power source kicks in to provide power support. The current limit threshold of each eFuse is set to be lower than its maximum rated current.

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San Jose, CA, United States of America

Ming Lu