Industrial Technology Research Institute

Macroblock, Inc.

Ming-Jer Kao

Chien-Chung Hung

Yuan-Jen Lee

Jeng-Hua Wei

Hung-Hsiang Wang

Yung-Hsiang Chen

Ming-Jiunn Lai

Po-Yuan Lo

Tsung-Ming Pan

Lien-Chang Wang

Hsin-Hui Chen

Chung-Min Liu

Jih-Shun Chiang

Chih-Wei Hsu

Wei-Chuan Chen

Ming-Hsien Wu

Yen-Hsiang Fang

Chia-Hsin Chao

Ming-Jinn Tsai

Ding-Yeong Wang

Yung-Hung Wang

Po-Hsun Wang

Chien-Chung Lin

Chien-Liang Hwang

June-Min Yao

Shu-En Li

Jung-Hua Wei

Bae-Horng Chen

Chian-Liang Hwang

Kuo-Lung Chen

Ming-Jin Tsai

Feng-Pin Chang

A display device including a circuit substrate, a plurality of pixels, and a light-shielding layer is provided. The pixels include a plurality of light-emitting elements. The light-emitting elements are disposed on the circuit substrate and are electrically connected to the circuit substrate. The light-emitting elements in the pixels are arranged along an arrangement direction. The light-shielding layer is disposed on the circuit substrate and has a plurality of pixel apertures. The pixels are disposed in a corresponding pixel aperture. The light-shielding layer includes a plurality of first light-shielding patterns extending in the arrangement direction and a plurality of second light-shielding patterns connected to the first light-shielding patterns. The extending direction of the second light-shielding patterns is different from the extending direction of the first light-shielding patterns. A thickness of the first light-shielding patterns is greater than or substantially equal to a thickness of the second light-shielding patterns.

Display device

A method for writing a memory cell of a magnetoresistive random access memory (MRAM) device includes, sequentially, providing a first magnetic field in a first direction, providing a second magnetic field in a second direction substantially perpendicular to the first direction, turning off the first magnetic field, providing a third magnetic field in a third direction opposite to the first direction, turning off the second magnetic field, and turning off the third magnetic field. A method for switching magnetic moments in an MRAM memory cell includes providing a magnetic field in a direction forming a blunt angle with a direction of a bias magnetic field. A method for reading an MRAM device includes partially switching magnetic moments in a reference memory cell to generate a reference current; measuring a read current through a memory cell to be read; and comparing the read current with the reference current.

Method for switching magnetic moment in magnetoresistive random access memory with low current

A method for accessing a memory cell of a magnetoresistive random access memory (MRAM) device, where the memory cell includes a plurality of memory units, includes writing the memory cell by identifying ones of the memory units having stored therein a datum different from a datum to be written thereto; and simultaneously writing all of the ones of the memory units. An MRAM device includes a plurality of write word lines, a plurality of write bit lines, and a plurality of memory cells. Each memory cell includes a plurality of memory units. Each memory unit includes a free magnetic region having one or more easy axes non-perpendicular to the write bit lines and non-perpendicular to the write word lines, a pinned magnetic region, and a tunneling barrier between the free magnetic region and the pinned magnetic region.

High-bandwidth magnetoresistive random access memory devices and methods of operation thereof

A multi-bit magnetic memory cell in a stacked structure controlled by at least one read bit line and one read word line is provided. The multi-bit magnetic memory cell includes at least two magnetic memory units and a switching device. Each magnetic memory unit has a magneto-resistance value and at least the two magnetic memory units are stacked to form a circuit of serial connection or parallel connection. The circuit and the read bit line are connected. The switching device is connected to the circuit, wherein the switching device is controlled by the read word line to be conducting or non-conducting so as to connect the circuit with a ground voltage. Furthermore, a plurality of the multi-bit magnetic cells is used to form a magnetic memory device.

Magnetic memory cell with multiple-bit in stacked structure and magnetic memory device

A magnetic random access memory includes at least a first-direction write current line and multiple second-direction write current line, intersecting with the first-direction write current line in substantial perpendicular and forming several intersecting regions. Multiple magnetic memory cells are respectively located at the intersecting regions for receiving an induced magnetic field in a time sequence. Every at least two adjacent memory cells are in parallel or series connection, to form at least one memory unit. An easy axis of a free layer of each magnetic memory cell is substantially perpendicular to a magnetization of a pinned layer. The easy axis and the first-direction write current line form an including angle of about 45&#xb0;. A read bit-line circuit connects to a first terminal of the memory unit. A read word-line circuit connects to a second terminal of the memory unit.

Magnetic random access memory and operation method

A metal nanoline process and applications on growth of aligned nanostructures thereof. A nano-structure is provided with a substrate with at least one nanodimensional metal catalyst line disposed thereon and at least one carbon nanotube or silicon nanowire extending along an end of the metal catalyst line.

Metal nanoline process and applications on growth of aligned nanostructure thereof

A magnetic memory cell, used in a magnetic memory device, includes a stacked magnetic pinned layer, serving as a part of the base structure. The stacked magnetic pinned stacked layer has a top pinned layer and a bottom pinned layer, between which there is a sufficient large magnetic coupling force to maintain magnetization of the top pinned layer on a reference direction. A tunnel barrier layer is disposed on the stacked magnetic pinned layer. A magnetic free stacked layer is disposed on the tunnel barrier layer. The magnetic free stacked layer includes a bottom free layer having a bottom magnetization and a top free layer having a top magnetization. When no assisted magnetic field is applied, the bottom magnetization is anti-parallel to the top magnetization and is perpendicular to the reference direction on the top pinned layer. A magnetic bias layer can be also disposed on the top free layer.

Structure and access method for magnetic memory cell and circuit of magnetic memory

A writing method for a magnetic memory cell which has a magnetic free stack layer with a bi-directional easy axis. A magnetic X axis and a magnetic Y axis are taken as reference directions, and the bi-directional easy axis is substantially on the magnetic X axis. The method includes applying a first magnetic field in a first direction of the magnetic Y axis. Then, a second magnetic field added onto the first magnetic field is applied in a first direction of the magnetic X axis. Next, the application of the first magnetic field is terminated. Thereafter, a third magnetic field is applied on the magnetic Y axis in a second direction opposite to the first direction. The second magnetic field is terminated and the third magnetic field is terminated.

Writing method for magnetic memory cell and magnetic memory array structure

A magnetoresistive random access memory (MRAM) device includes a memory cell corresponding to one read bit line, one read word line, one write word line, and two or more write bit lines. The memory cell includes a first memory unit and a second memory unit each corresponding to a respective write bit line. Each of the first and second memory units comprises: a free magnetic region having a first easy axis, a pinned magnetic region having a second easy axis, and a tunneling barrier between the free magnetic region and the pinned magnetic region.

High-bandwidth magnetoresistive random access memory devices

A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.

High write selectivity and low power magnetic random access memory and method for fabricating the same

Method of making an electroplated interconnection wire of a composite of metal and carbon nanotubes is disclosed, including electroplating a substrate having a conductive baseline on a surface thereof in an electroplating bath containing a metal ion and carbon nanotubes, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline. Alternatively, a method of the present invention includes preparing a dispersion of carbon nanotubes dispersed in an organic solvent, printing a baseline with the dispersion on a surface of a substrate, evaporating the organic solvent to obtain a conductive baseline, and electroplating the surface in an electroplating bath containing a metal ion, so that an electroplated interconnection wire of a composite of the metal and carbon nanotubes is formed on the conductive baseline.

Method of making an electroplated interconnection wire of a composite of metal and carbon nanotubes

A magnetic random access memory with lower switching field is provided. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, and a multi-layered metal layer. The multi-layered metal layer is formed by at least one metal layer, where the direction of the anisotropy axis of the antiferromagnetic layer and the ferromagnetic layer and that of the ferromagnetic free layer are arranged orthogonally. The provided memory has the advantage of lowering the switching field of the ferromagnetic layer, and further lowering the writing current.

Magnetic random access memory with lower switching field

The present invention relates to a structure and manufacturing process of a nano device transistor for a biosensor. The structure, the manufacturing process and the related circuit for a carbon nano tube or nano wire transistor biosensor device are provided. The refurbished nano device is used for absorbing various anti-bodies so as to detect the specific antigens or absorbing various biotins. Therefore, the object of the present invention to detect the specific species for bio measurement can be achieved.

Structure and manufacturing process of a nano device transistor for a biosensor

The present invention relates to a hybrid MRAM architecture, and more particularly to a hybrid MRAM architecture capable of being used with an MCU and an MPU. This hybrid MRAM architecture is adapted to a controlling device for accessing a bit of information, comprising a plurality of first MRAM arrays (1T1MTJ architecture), a plurality of second MRAM arrays (XPC architecture), an address line, an access decoder, a sensing and writing circuit, and at least one I/O bus. The access decoder accesses to the bit of information from either the first or the second MRAM arrays selected in accordance with an address signal from the controlling device. The sensing and writing circuit amplifies the bit of information and transmits it to the controlling device via the at least one I/O bus. Accordingly, the access of the bit of information is completed.

Growing community of inventors

Tainan, Taiwan

Ming-Jer Kao