International Business Machines Corporation

Ming-i Mark Lin

Eric Oliver Mejdrich

Giora Biran

Clarence Rosser Ogilvie

Jamie Randall Kuesel

Robert Allen Drehmel

Charles S Woodruff

Mark E Kautzman

Robert Spencer Horton

David Robert Stauffer

Adam James Muff

David Arnold Luick

Mark Owen Maxson

Todd Edwin Leonard

James Anthony Marcella

Gregory John Mann

Brian John Connolly

Jonathan H Raymond

Matthew Adam Cushing

Allen James Gavin

A system for generating CRC code words associated with data ranging up to w-bytes in width to be communicated over a communications channel includes a first plurality of serially coupled code-generation blocks each for generating a CRC value based on data input to each block, respective blocks of the first plurality configured for receiving data inputs having respective byte widths ranging from 2+M to 2+M, where N is equal to log(w), and M is an offset value, and L is a whole number based on a maximum propagation delay criteria; a second plurality of parallel coupled code-generation blocks each for generating a CRC value based on data inputs, respective blocks of the second plurality configured for receiving data having respective byte widths ranging from 2&#x2212;1+M to 2; and, a device for selecting particular CRC code generation blocks in the first and second pluralities to be included in a CRC calculation based on the data input; wherein any number of data input bytes may be processed.

System and method for optimizing iterative circuit for cyclic redundency check (CRC) calculation

A bus bridge between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a bus bridge between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI). Another preferred embodiment is a bus bridge in a bus transceiver on a multi-chip module.

Computer system bus bridge

A method for bridging between a high speed computer processor bus and a high speed output bus. The preferred embodiment is a method for bridging between a GPUL bus for a GPUL PowerPC microprocessor from International Business Machines Corporation (IBM) and an output high speed interface (MPI).

A high speed computer processor system has a high speed interface for a graphics processor. A preferred embodiment combines a PowerPC microprocessor called the Giga-Processor Ultralite (GPUL) 110 from International Business Machines Corporation (IBM) with a high speed interface on a multi-chip module.

Computer system architecture for a processor connected to a high speed bus transceiver

A CRC generator/checker for generating CRC results, comprising: a set of CRC circuits connected in series, each CRC circuit responsive to a different control signal generated by a control logic, each CRC circuit having a seed input adapted to receive a seed, a data input adapted to receive and process a different set of M-bits of a data unit and a result output adapted to generate a result, the result output of a previous CRC circuit connected to the seed input of an immediately subsequent CRC circuit, the seed input of a first CRC circuit connected to an output of a remainder register, an input of the remainder register connected to an output of a multiplexer, the result outputs of the multiplicity of CRC circuits connected to different inputs of the multiplexer, the multiplexer responsive to a select signal generated by the control logic.

Multilevel parallel CRC generation and checking circuit

A system for generating CRC code words associated with data ranging up to w-bytes in width. The system is an iterative approach for providing a CRC calculation circuitry with the CRC calculation being subdivided into a blocks with selectable bus widths which blocks can be cascaded to provide calculation for a parallel bus width of any arbitrary number of bytes. The circuitry includes a first plurality of serially coupled code-generation blocks each for generating a CRC value based on data input to each block; a second plurality of parallel coupled code-generation blocks each for generating a CRC value based on data inputs, and, a device for selecting particular CRC code generation blocks in the first and second pluralities to be included in a CRC calculation based on the data input such that any number of data input bytes may be processed.

System and method for optimizing iterative circuit for cyclic redundancy check (CRC) calculation

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South Burlington, VT, United States of America

Ming-i Mark Lin