Taiwan Semiconductor Manufacturing Comp. Ltd.

Ming-Hui Yang

Ho-Chun Liou

Chun-Ting Liao

Yi-Te Chen

Chen-Yuan Chen

Hsin Wei Chiu

A device includes an integrated circuit, a first seal ring, a second seal ring, and a dielectric layer. The first seal ring surrounds the integrated circuit and includes a plurality of first seal portions separated from each other by a plurality of first gaps. The second seal ring surrounds the integrated circuit, between the integrated circuit and the first seal ring and includes a plurality of second seal portions separated from each other by a plurality of second gaps. The dielectric layer surrounds the first and second seal rings and includes a plurality of first filling portions in the first gaps, respectively, and a plurality of second filling portions in the second gaps, respectively. A connection line of one of the first filling portions and one of the second filling portions closest to said one of the first filling portions is not parallel to edges of the integrated circuit.

Semiconductor device

A device includes an outer seal ring, an integrated circuit, and an inner seal ring. The outer seal ring forms a first closed loop. The integrated circuit is surrounded by the outer seal ring. The inner seal ring is between the outer seal ring and the integrated circuit. The inner seal ring forms a second closed loop that defines an enclosed region external to the integrated circuit.

A semiconductor device includes an integrated circuit, an outer seal ring, and an inner seal ring. The outer seal ring forms a first closed loop surrounding the integrated circuit. The inner seal ring is between the outer seal ring and the integrated circuit. The inner seal ring has a first seal portion surrounding the integrated circuit and a second seal portion spaced apart from the first seal portion, a first connector interconnecting the first seal portion and the second seal portion, and a second connector spaced apart from the first connector and interconnecting the first seal portion and the second seal portion. The first seal portion, the second seal portion, the first connector, and the second connector form a second closed loop.

A method of manufacturing a semiconductor device comprises forming an integrated circuit, surrounding the integrated circuit with an inner seal ring, and surrounding the inner seal ring with a closed-loop outer seal ring. The inner seal ring includes a plurality of metal layers in a stacked configuration, first and second seal portions separated from each other, and third and fourth seal portions spaced apart from the first and second seal portions and separated from each other.

Semiconductor device and manufacturing method thereof

A semiconductor device includes an integrated circuit and a guard ring. The integrated circuit includes a first circuit and a second circuit separated from the first circuit. The guard ring is disposed around the first circuit and between the first circuit and the second circuit. The guard ring includes an outer ring, an inner ring, and two connectors. The outer ring is disposed around the first circuit and has a first gap. The inner ring is disposed between the outer ring and the first circuit and has a second gap. The two connectors connect the outer ring and the inner ring. The outer ring, the inner ring, and the two connectors form a closed loop.

A semiconductor device includes an integrated circuit, at least one outer seal ring, and at least one inner seal ring. The outer seal ring surrounds the integrated circuit. The outer seal ring includes a plurality of metal layers in a stacked configuration, and the metal layers are closed loops. The inner seal ring is disposed between the outer seal ring and the integrated circuit and separated from the outer seal ring. The inner seal ring has at least one gap extending from a region encircled by the inner seal ring to a region outside the inner seal ring.

A double seal ring for an integrated circuit, the double seal ring includes a first seal ring surrounding the integrated circuit and a second seal ring spaced from the first seal ring. The double seal ring further includes two connectors connecting the first seal ring and the second seal ring, wherein the first seal ring, the second seal ring, and the two connectors form a closed loop. A method of forming a double seal ring for an integrated circuit includes forming a first seal ring surrounding the integrated circuit and forming a second seal ring spaced from the first seal ring. The method further includes forming two connectors connecting the first seal ring and the second seal ring, wherein the first seal ring, the second seal ring, and the two connectors form a closed loop.

Double seal ring

A double seal ring for an integrated circuit includes a first seal ring with a first opening. The first seal ring surrounds the integrated circuit. A second seal ring with a second opening surrounds the first seal ring. Two connectors connect the first opening of the first seal ring and the second opening of the second seal ring. The first seal ring, the second seal ring, and the two connectors form a closed loop.

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Taipei, Taiwan

Ming-Hui Yang