Realtek Semiconductor Inc.

Ming-Hui Tung

Chien-Wen Chen

Tsung-Yen Liu

Guan-Yu Chen

An-Ming Lee

Leaf Chen

Shawn Min

Bo-Yu Chen

Li-Jun Gu

Chun-Ming Chou

Wei-Chi Chen

An amplifier includes an amplifier circuit and a gain adjusting circuit. The amplifier circuit has a design gain and a real gain and is configured to output an output signal according to an input signal and the real gain. The gain adjusting circuit is coupled to the amplifier circuit and is configured to receive the input signal to compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjusting circuit increases the real gain of the amplifier circuit, so that the real gain approach the design gain.

Amplifier

The present invention discloses a signal output circuit having DC gain maintaining mechanism used in an image signal transmission apparatus that includes a front-stage driving circuit and a back-stage driving circuit. The front-stage driving circuit includes a continuous time linear equalizer (CTLE) having an adjusting capacitor and configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a front-stage output signal. The back-stage driving circuit includes a CTLE without the adjusting capacitor and configured to increase a DC gain of the front-stage output signal to compensate a DC gain drop between the front-stage output signal and the digital input signal to generate a back-stage output signal to an image signal receiving apparatus.

Image signal transmission apparatus and signal output circuit having DC gain maintaining mechanism thereof

The present invention discloses a signal output apparatus. Each of two output circuits includes an inverter including an input terminal and an output terminal, and a resistor coupled between the output terminal and a differential output terminal. Each of MOS capacitors is coupled between the output terminals. Under a first operation mode, two current supplying circuits are disabled. The input terminals respectively receive a high and a low state input voltages and the output terminals generate a low and a high state output voltages. The capacitances become larger than a predetermined level. Under a second operation mode, one of the current supplying circuits is enabled to output a supplying current to the differential output terminal. The input terminals receive the high state input voltage. The output terminals generate the low state output voltage. The capacitances become not larger than the predetermined level.

Signal output apparatus and method

A signal detector includes oversampling circuitries and a detector circuitry. The oversampling circuitries are configured to receive a first signal and a second signal from a channel, and to sequentially sample the first signal and the second signal according to a plurality of clock signals to generate a plurality of signal difference values, and to compare the plurality of signal difference values with a reference difference value, in order to generate a plurality of detection signals. The detector circuitry is configured to generate a noise indication signal according to the plurality of detection signals, in order to indicate whether the first signal and the second signal are noises.

Signal detector and signal detection method

The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.

Circuit capable of protecting low-voltage devices

A clock circuit has a clock input terminal, a first clock output terminal, and a second clock output terminal. The clock circuit includes a pulse width adjustment module, a sampling module, a comparing module, and a differential signal converting module. A differential input terminal is electrically connected to a pulse width output terminal of the pulse width adjustment module. A positive differential signal output terminal and a negative differential signal output terminal are electrically connected to the first clock output terminal of the clock circuit and the second clock output terminal to output two clock signals with a phase difference of 180 degrees, respectively. A second input terminal of the sampling module is electrically connected to the second clock output terminal.

Clock circuit having a pulse width adjustment module

A combo chip is provided. The combo chip is applicable to an USB connector, and includes an USB type-C circuit, an USB non-type-C circuit, a switch unit, and a mode control unit. The switch unit is connected to the USB type-C circuit and the USB non-type-C circuit, and the mode control unit is connected to a control terminal of the switch unit. After performing one or more mode determination procedures, the mode control unit controls the switch unit to connect the USB type-C circuit to a first pin and a second pin while disconnecting the USB non-type-C circuit from the first pin and the second pin, or otherwise controls the switch unit to connect the USB non-type-C circuit to the first pin and the second pin while disconnecting the USB type-C circuit from the first pin and the second pin.

Combo chip for USB connector

A switch and a multiplexer including the same are provided, which are applicable to selectively transmit the high frequency signal from an input terminal to an output terminal therethrough. The switch includes a switch device and a variable resistor. The switch device is connected between the input terminal and the output terminal, and the switch device includes a control terminal and is configured to be switched between ON and OFF according to a switch controlling signal provided to the control terminal. The variable resistor is connected to the control terminal and configured to change to a first resistance while the switch device is ON, and to change to a second resistance while the switch device is OFF according to a resistor controlling signal. The first resistance is higher than the second resistance, and the resistor controlling signal is changed corresponding to the switch controlling signal.

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Hsinchu, Taiwan

Ming-Hui Tung