Asmedia Technology Inc.

Ming-Hui Chiu

Chia-Hsin Chen

Yung-Chi Hwang

Ching-Fa Hsiao

A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system is a redundancy array of independent disk 0 (RAID 0) system. The disk array system includes a plurality of disks. The data processing method includes: receiving a reading command; determining whether to divide the reading command to a plurality of reading command segments according to the reading command; and assigning the reading command to a corresponding disk of the disks to read data stored in the corresponding disk accordingly when it is determined that the reading command is not divided.

RAID 0 disk array system and data processing method for dividing reading command to reading command segments and transmitting reading command segments to disks or directly transmitting reading command to one of disks without dividing

A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system includes a first disk and a second disk. The data processing method includes: receiving a reading command, wherein the reading, command includes a data starting address; determining to assign the reading command to the first disk or the second disk according to the data starting address of the reading command and a stripe size; and reading corresponding data according to the reading command from the first disk or the second disk which receives the reading command.

Disk array system and data processing method

An anti-timeout method applied to a data processing system is provided. The data processing system includes a disk module. The anti-timeout method includes following steps: setting a total volume of the disk module into a plurality of virtual disk volumes, wherein each of the virtual disk volumes includes an instruction temporary storing queue for temporarily storing operating instructions corresponding to each virtual disk volume; selecting one of the instruction temporary storing queues and processing the operating instructions stored in the selected instruction temporary storing queue; calculating a continuous operating value of continuous processing of the selected instruction temporary storing queue; and selecting another one of the instruction temporary storing queues if the continuous operating value exceeds a predetermined threshold value.

Anti-timeout method and data processing system

A data transmission device and a command merging method for data transmission are provided. The data transmission device includes a command register and a command merging unit. The command register receives and temporary storages a plurality of original commands, wherein the original commands include a plurality of memory blocks. When the command merging unit judges these memory blocks of the original commands to be a continuous memory block, the command merging unit merges the original commands into a merging command, and transmits the merging command to a peripheral device. Thus, the multiple commands send by the host can be analyzed and merged by the data transmission device to decrease a number of the commands to be proceed by the peripheral device, so as to speed up a command processing time of the peripheral device efficiently.

Data transmission device and method for merging multiple commands

The disclosure is related to a method for transforming voltage identification codes of a microprocessor. The method comprises the steps of: receiving a first voltage identification code of a first voltage regulation standard, wherein the first voltage identification code is in correspondence with a first voltage; and transforming the first voltage identification code into a second voltage identification code of a second voltage regulation standard, wherein the second voltage identification code is in correspondence with a second voltage, and the second voltage is the same as the first voltage.

Method for transforming voltage identification code of a microprocessor

The invention relates to a method for converting a voltage identification code includes the steps as follows. A special binary code range is obtained, and N special voltage identification codes corresponding to a special command are converted to N special binary codes under a converting relation, and the N special binary codes are used as the special binary code range. A first voltage identification code is converted to a corresponding first binary code under the converting relation. In addition, the first binary code and a first preset value are used to compute to obtain a second binary code, and the second binary code is not in the special binary code range.

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Taipei, Taiwan

Ming-Hui Chiu