Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Ming Hu

Toshiyuki Takewaki

Hiroyasu Tanaka

Masahisa Sonoda

Seiichi Omoto

Shingo Nakajima

Akira Yotsumoto

A semiconductor memory device according to an embodiment comprises a substrate, a plurality of first conductive films, a memory columnar body, and a first structure. The plurality of first conductive films are stacked in a first direction above the substrate and extend in a second direction intersecting the first direction and in a third direction intersecting the first direction and the second direction. The memory columnar body extends in the first direction and has a side surface covered by the plurality of first conductive films. The first structure extends in the second direction and divides the plurality of first conductive films in the third direction. Moreover, each of the memory columnar body and the first structure comprises: a memory insulating film provided on a side surface of the first conductive film; and a first semiconductor layer provided on a side surface of the memory insulating film.

Semiconductor memory device and method of manufacturing the same

According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string. The memory string comprises a plurality of control gate electrodes, and a semiconductor layer. The contact comprises a contact layer, the contact layer having a plate-like shape whose longer direction is a first direction parallel to the substrate, and the contact layer having its lower surface electrically connected to the one end of the semiconductor layer. Moreover, the contact layer includes a metal layer, a silicon based layer, and a second conductive layer. The metal layer includes tungsten. The silicon based layer includes a material including silicon. The second conductive layer covers side surfaces of the metal layer and the silicon based layer.

Semiconductor memory device having memory cells provided in a height direction

According to one embodiment, a semiconductor device includes a stacked body; a columnar portion; a plate portion; and a blocking insulating film. The stacked body includes a plurality of electrode layers. The columnar portion includes a semiconductor body and a charge storage film. The plate portion includes a conductor and a sidewall insulating film. The sidewall insulating film is provided between the conductor and the insulator and between the conductor and the electrode layers. The conductor contacts the major surface of the substrate. The blocking insulating film is provided between the sidewall insulating film and the insulator, between the insulator and the electrode layers, and between the charge storage film and the electrode layers. The blocking insulating film includes a first blocking insulating layer and a second blocking insulating layer, the second blocking insulating layer being different from the first blocking insulating layer.

Semiconductor device

According to one embodiment, a semiconductor memory device includes a stacked body; a semiconductor body; a charge storage layer; a first conductor; a second conductor; and a third conductor. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body extends along a stacking direction of the stacked body. The first conductor is provided in the stacked body. The first conductor is in contact with the substrate. The second conductor includes a different material from the first conductor. The second conductor is in contact with a first portion of the first conductor. The third conductor includes a same material as the second conductor. The third conductor is in contact with a second portion of the first conductor.

Semiconductor memory device

A semiconductor device includes a semiconductor substrate, an interlayer insulating film on the semiconductor substrate and having a first hole extending therethrough, and a contact portion in the first hole of the interlayer insulating film. The contact portion includes a first silicon film along an inner surface of the first hole of the interlayer insulating film.

According to an embodiment, a semiconductor memory device comprises: a memory string comprising memory cells; and a contact electrically connected to one end of the memory string. The memory string comprises: control gate electrodes stacked above a first semiconductor layer; a second semiconductor layer having one end connected to the first semiconductor layer and having as its longitudinal direction a direction perpendicular to the first semiconductor layer, the second semiconductor layer facing the control gate electrodes; and a charge accumulation layer positioned between the control gate electrode and the second semiconductor layer. The contact has a plate-like shape whose longitudinal direction is a first direction, the contact has its lower surface connected to the first semiconductor layer, and the contact has a height of at least part of its upper surface lower than a height of an upper surface of the second semiconductor layer.

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Yokkaichi, Japan

Ming Hu