Chipmos Technologies Inc.

Chipmos Technologies (bermuda) Ltd

Ming-Hsun Li

Yao-Jung Lee

Ming-Liang Huang

Tsung-Lung Chen

A thin-film fingerprint sensor package primarily comprises a fingerprint sensor chip, a plurality of bumps, a wiring film with a plurality of leads and at least an encapsulant to encapsulate the bumps. A sensing area is formed on an active surface of the fingerprint sensor chip. The bumps are disposed on the active surface and located at two opposing sides of the sensing area. The wiring film has an opening to expose the sensing area. Each lead has an inner end and an outer end. The inner ends are located at two opposing sides of the opening and are bonded to the bumps. Preferably, the wiring film has a flexible extension and the outer ends of the leads are rerouted to the extension for external electrical connections.

Film type package for fingerprint sensor

A thin-film fingerprint sensor package primarily comprises a fingerprint sensor chip, a plurality of bumps, a wiring film, an encapsulant and a metal base to mechanically hold the fingerprint sensor chip. A sensing area is formed on the active surface of the fingerprint sensor chip. The bumps are disposed on the active surface. The wiring film has an opening to expose the sensing area and comprises a plurality of leads bonded to the bumps. The wiring film further has a ground lead electrically connecting the fingerprint sensor chip to the metal base. Therefore, the fingerprint sensor package can provide ESD protection during fingerprint recognition to avoid the damage of the fingerprint sensor chip.

A semiconductor packaging substrate with improved capability of electrostatic dissipation comprises a dielectric layer, a plurality of leads, a plurality of first electrostatic guiding traces, a plurality of second electrostatic guiding traces and a solder mask. The first electrostatic guiding traces and the second electrostatic guiding traces are formed in pairs in a plurality of electrostatic dissipation regions on the dielectric layer, where each pair of the first and second electrostatic guiding traces are disposed in equal line spacing and are electrically isolated from each other. The solder mask partially covers the leads but exposes the first electrostatic guiding traces and the second electrostatic guiding traces. The first electrostatic guiding traces are connected to some of the leads to enhance protection against electrostatic discharge.

Growing community of inventors

Tainan, Taiwan

Ming-Hsun Li