Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Ming-Hsuan Wang

Ting-Hao Wang

Igor Elkanovich

Yu-Cheng Sun

Yen-Chih Chiu

Wei-Chieh Liao

Hao-Yu Tung

A routing structure between dies is provided, including a trace layer, disposed on a substrate, wherein a plurality of routing paths is embedded in the trace layer. In addition, a first die and a second die are disposed on the trace layer and connected by the routing paths. A spacing gap between the first die and the second die is along a first direction and interfacing edges of the first die and the second die are extending along a second direction perpendicular to the first direction. Each of the routing paths includes a first straight portion in parallel to connect to the interfacing edges. The first straight portion has a slant angle with respect to the first direction other than 0&#xb0; and 90&#xb0;.

Routing structure between dies and method for arranging routing between dies

A semiconductor wiring substrate includes a first wiring layer, a second wiring layer stacked on the first wiring layer, and a dielectric layer sandwiched between the first wiring layer and the second wiring layer. The first wiring layer includes first signal lines and first grounding lines which are interleaved and spaced apart in the first wiring layer. The second wiring layer includes second signal lines and second grounding lines which are interleaved and spaced apart in the second wiring layer. An orthographic projection of one of the second signal lines to the first wiring layer is located between each two adjacent ones of the first signal lines.

Wiring substrate having alternating ground and signal lines in a plurality of wiring layers

Growing community of inventors

Hsinchu, Taiwan

Ming-Hsuan Wang