Industrial Technology Research Institute

Ming-Ho Lu

Chi-Tien Sun

A channel estimation apparatus includes a de-map circuit to map multiple preambles corresponding to multiple channels into real part (I) and imaginary part (Q) in QPSK coordinate. The costas channel estimation circuit receives the real part (I) and the imaginary part (Q) to operate corresponding to one of the BPSK structure and the QPSK structure to proceed calculation of (Q&#x2212;I)*Sign (I+Q) or Q*Sign (I)&#x2212;I*Sign (Q) for outputting an output value, wherein Sign(x) represents a sign circuit taking a sign of the x value. The loop filter circuit filters the output value under time domain. The smooth circuit receives the output of the loop filter circuit to perform smooth processing under frequency domain and then feeds back the same to the de-map circuit to continue channel estimation of a next loop, wherein the phases of the preambles are adjusted according to a direction of the output value approaching to zero.

Apparatus and method for channel estimation

A pre-decoded tail-biting convolutional code (TBCC) decoder and a decoding method thereof are provided. The decoder includes a pre-decoder, a storage module, and a control module. The pre-decoder receives a current state, a neighboring state, and a current path status corresponding to sequential data encoded in TBCC, generates predicted decoded bits, and determines whether states corresponding to minimum path metrics of neighboring stages are in continuity according to the current state, the neighboring state, and a current path status. The storage module is connected to the pre-decoder and stores the predicted decoded bits. The control module is connected to the storage module and the pre-decoder. In addition, the control module selects to output the decoded bits from the storage module when the continuity between the states corresponding to the minimum path metrics of the neighboring stages reaches a truncation length.

Pre-decoded tail-biting convolutional code decoder and decoding method thereof

A method of computing a vector angle by using a CORDIC and an electronic apparatus using the same are disclosed. The electronic apparatus mainly includes a phase error detector, a loop filter, a small-area iteration LUT module and a phase compensation circuit. The phase error can be locked by using the error function in the phase error detector, and even the phase error can be locked to the minimum so that the error oscillates up-and-down about the zero level. The first transfer function in the loop filter can determine the baseband and the converging speed. Moreover, if the shifting technique is used, the operation of the first transfer function is speeded up. By using a phase-locking loop in association with looking up the above-mentioned LUT, the method is able to get fast converging and higher accuracy for the computation.

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Yunlin County, Taiwan

Ming-Ho Lu