Taiwan Semiconductor Manufacturing Comp. Ltd.

Ming-Heng Tsai

Chun-Sheng Liang

Kuo-Hua Pan

Shih-Hsun Chang

Yi-Ren Chen

Pei-Lin Wu

Hsin-Che Chiang

Jeng-Ya David Yeh

Yong-Yan Lu

Hong-Nien Lin

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a spacer over a side of the gate stack. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a first recess, the dielectric layer has an upper portion and a first lower portion, the upper portion is over the first recess, the first recess is between the first lower portion and the spacer, and the upper portion has a convex curved sidewall.

Semiconductor device structure with spacer

A semiconductor device and method of forming the same are disclosed. The semiconductor device includes a fin structure, a gate electrode, a source-drain region, a plug and a hard mask structure. The gate electrode crosses over the fin structure. The source-drain region in the fin structure is aside the gate electrode. The plug is disposed over and electrically connected to the gate electrode. The hard mask structure surrounds the plug and is disposed over the gate electrode, wherein the hard mask structure includes a first hard mask layer and a second hard mask layer, the second hard mask layer covers a sidewall and a top surface of the first hard mask layer, and a material of the first hard mask layer is different from a material of the second hard mask layer.

Semiconductor device and method of forming the same

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate, wherein the gate stack has a first portion and a second portion under the first portion, and the first portion is wider than the second portion. The semiconductor device structure includes a first spacer and a second spacer over opposite sides of the gate stack. The first spacer has a first upper portion and a first lower portion, the second spacer has a second upper portion and a second lower portion. The first spacer has a first recess, the first upper portion is between the first recess and the gate stack, the first lower portion is under the first recess, and the first recess has a first inner wall facing away from the gate stack.

Semiconductor device structure with recessed spacer

A method for manufacturing a semiconductor device includes forming a shallow trench isolation (STI) structure surrounding a pair of semiconductor fins; forming a dummy gate layer over the STI structure and the semiconductor fins; etching a first portion of the dummy gate layer to form a trench through the dummy gate layer until the STI structure is exposed, in which the trench extends between the semiconductor fins along a lengthwise direction of the semiconductor fins; forming an insulating structure in the trench through the dummy gate layer; after forming the insulating structure extending through the dummy gate layer, patterning the dummy gate layer to form a pair of dummy gate structures each of which is across a respective one of the semiconductor fins; and replacing the dummy gate structures with a pair of metal gate structures.

Method for manufacturing semiconductor device

A semiconductor device includes a substrate, a gate disposed over the substrate, a source/drain disposed in the substrate at two sides of the gate, and an insulating layer disposed over sidewalls of the gate and at least a portion of a surface of the source/drain. In some embodiments, the insulating layer includes a first side facing the gate or the source, and includes a second side opposite to the first side. The insulating layer includes dopants, and a concentration of the dopants is reduced from the second side to the first side of the insulating layer.

CMOS finFET with doped spacers and method for forming the same

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The gate stack has a first upper portion and a first lower portion, and the first upper portion is wider than the first lower portion. The semiconductor device structure includes a spacer layer surrounding the gate stack. The spacer layer has a second upper portion and a second lower portion. The second upper portion is thinner than the second lower portion.

Semiconductor device structure

A semiconductor device includes a substrate, at least one gate, and an insulating structure. The substrate includes at least one semiconductor fin. The gate is disposed on the semiconductor fin. The gate has at least one end sidewall. The insulating structure is disposed adjacent to the gate. The insulating structure has a sidewall facing the gate, and the end sidewall of the gate is in contact with a portion of the sidewall of the insulating structure while leaves another portion of the sidewall of the insulating structure uncovered.

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Taipei, Taiwan

Ming-Heng Tsai