Siliconware Precision Industries Co., Ltd.

Ming-Fan Tsai

Chih-Hsien Chiu

Chia-Yang Chen

Hsin-Hung Lee

Tsung-Hsien Tsai

Bo-Shiang Fang

Chien-Cheng Lin

Chao-Ya Yang

Chi-Pin Tsai

Chih-Wei Chen

Heng-Cheng Chu

Ying-Wei Lu

Kuan-Yu Chen

Chih-Yuan Shih

Yueh-Chiung Chang

Tsung-Li Lin

Jyun-Yuan Jhang

Yen-Yu Chen

Chia-Chu Lai

Ho-Chuan Lin

Chi-Liang Shih

Li-Fang Lin

An electronic package and a manufacturing method thereof are provided, where a plurality of shielding wires are arranged on a carrier and spanning across an electronic component to cover the electronic component, so that the shielding wires serve as a shielding structure to protect the electronic component from the interference of external electromagnetic waves.

Electronic package and method for manufacturing the same

An electronic device is provided, in which an antenna module for receiving and transmitting radiation signals is disposed on a mounting surface of a circuit board, and an inner layer of the circuit board is formed with a ground surface to arrange a strip-shaped ground circuit along the edges of the ground surface so that the ground circuit occupies at most 50% of the area of the ground surface to improve antenna radiation efficiency.

Electronic device and circuit board thereof

An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

Method for fabricating electronic package structure

The disclosure provides an electronic package, including a carrier, an electronic component disposed on the carrier, a buffer, and an antenna structure, wherein the antenna structure includes a metal frame disposed on the carrier and a wire disposed on the carrier and electrically connected to the metal frame, and the buffer covers the wire so as to reduce the emission wave speed of the wire and thus the wavelength is shorten, thereby satisfying the length requirement of the antenna within the limited space of the carrier and achieving an operating frequency radiated as required.

Electronic package

Electronic package structure and fabrication method thereof

An electronic package includes a circuit structure having a first metal layer, a packaging layer formed on the circuit structure, and a second metal layer formed on the packaging layer and separated from the first metal layer at a distance. The first metal layer and the second metal layer constitute an antenna structure. Since the second metal layer is formed on a portion of a surface of the packaging layer, a propagating wave emitted by the first metal layer cannot pass through the second metal layer, but a surface of the packaging layer not covered by the second metal layer. Therefore, the propagating wave can be transmitted to a predetermined target, and the electronic package performs the function of an antenna.

Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.

Electronic package with antenna structure

An electronic package is provided, which includes: a substrate, an electronic element disposed on the substrate, and an antenna structure disposed on the substrate. The antenna structure has a base portion and at least a support portion, the base portion including a plurality of openings and a frame separating the openings from one another, and the support portion supporting the base portion over the substrate. Therefore, no additional area is required to be defined on a surface of the substrate, and the miniaturization requirement of the electronic package is thus met.

A balanced-to-unbalanced converter (balun) is provided, including: a converting circuit having a first processing circuit including a first inductor and a first capacitor connected in series, a second processing circuit including a second capacitor and a second inductor connected in series, the second capacitor being electrically connected to the first inductor, and two balanced output ends connected to the first processing circuit and the second processing circuit, respectively; and a preprocessing circuit connected to the converting circuit and including an unbalanced input end for converting real impedance at the unbalanced input end into complex impedance at the balanced output ends. Accordingly, the balun satisfies the need of the wireless communication chips by providing differential signals with complex impedance. This is done by employing the preprocessing circuit in conjunction with the converting circuit to convert an unbalanced signal with real impedance into a balanced signal with complex impedance.

Balanced-to-unbalanced converter

An interconnecting mechanism is provide, which includes paired first sub-interconnecting mechanisms and paired second sub-interconnecting mechanisms. The first pair of sub-interconnecting mechanisms includes first and second axially symmetrical spiral conductive elements. The second pair of sub-interconnecting mechanisms includes third and fourth axially symmetrical spiral conductive elements. Configuring the pairs of sub-interconnecting mechanisms in a differential transmission structure having a spiral shape is used to avert sounds and noise signals between different chips or substrates caused by a miniaturizing fabrication process or an increased wiring density.

Interconnecting mechanism for 3D integrated circuit

An asymmetric differential inductor includes first and second conductive wirings spirally disposed on a substrate having a first input terminal, a second input terminal, a ground terminal, and a central conductive wiring. The central conductive wiring has a central contact connecting the ground terminal and a central end away from the ground terminal. The first conductive wiring extends across the central conductive wiring and has a first contact connecting the first input terminal and a first end connecting the central end. The second conductive wiring extends across the central conductive wiring and interlaces with the first conductive wiring and has a second contact connecting the second input terminal and a second end connecting the central end. Corresponding portions of wiring sections of the first and second conductive wirings at opposite sides of the central conductive wiring are asymmetrical to one another to thereby save substrate space and facilitate circuit layout.

Asymmetric differential inductor

A layer structure with an electromagnetic interference (EMI) shielding effect is applicable for reducing an EMI effect caused by signal transmission between through silicon vias, so as to effectively provide the EMI shielding effect between electrical interconnections of a three-dimensional (3D) integrated circuit. By forming EMI-shielding through silicon vias at predetermined positions between the through silicon vias used for signal transmission, a good EMI shielding effect can be attended, and signal distortion possibly caused by the EMI effect can be reduced between different chips or substrates.

Layer structure with EMI shielding effect

A symmetric differential inductor structure includes first, second, third and fourth spiral conductive wirings disposed in four quadrants of a substrate, respectively. Further, a fifth conductive wiring connects the first and fourth spiral conductive wirings, and a sixth conductive wiring connects the second and third spiral conductive wirings. The first and second spiral conductive wirings are symmetric but not intersected with one another, and the third and fourth spiral conductive wirings are symmetric but not intersected with one another. Therefore, the invention attains full geometric symmetry to avoid using conductive wirings that occupy a large area of the substrate as in the prior art and to thereby increase the product profit and yield.

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Taichung, Taiwan

Ming-Fan Tsai