Taiwan Semiconductor Manufacturing Comp. Ltd.

Ming-Chu King

Ching-Hwanq Su

Chih-Mu Huang

Shih-Shiung Chen

Hung-Jen Lin

Ying-Chen Chao

Chih-Fu Chang

Yen-Hsiu Chen

Chen Cheng Chou

Yun Chen Chang

Chao-Chi Chin

Chia-Wen Shiue

A stacked metal-oxide-metal (MOM) capacitor structure and method of forming the same to increase an electrode/capacitor dielectric coupling area to increase a capacitance, the MOM capacitor structure including a plurality of metallization layers in stacked relationship; wherein each metallization layer includes substantially parallel spaced apart conductive electrode line portions having a first intervening capacitor dielectric; and, wherein the conductive electrode line portions are electrically interconnected between metallization layers by conductive damascene line portions formed in a second capacitor dielectric and disposed underlying the conductive electrode line portions.

Metal-oxide-metal structure with improved capacitive coupling area

A test circuit for identification of locations with low speed performance. A grid of ring oscillator units and switches connect or disconnect the ring oscillator units to or from each other, such that the locations with low speed performance are identified according to frequencies of oscillation signals generated by rows and columns of ring oscillators respectively formed by operating the test circuit in two different modes.

Apparatus for identification of locations of a circuit within an integrated circuit having low speed performance

A novel, low-temperature metal deposition method which is suitable for depositing a metal film on a substrate, such as in the fabrication of metal-insulator-metal (MIM) capacitors, is disclosed. The method includes depositing a metal film on a substrate using a deposition temperature of less than typically about 270 degrees C. The resulting metal film is characterized by enhanced thickness uniformity and reduced grain agglomeration which otherwise tends to reduce the operational integrity of a capacitor or other device of which the metal film is a part. Furthermore, the metal film is characterized by intrinsic breakdown voltage (V) improvement.

Low temperature method for metal deposition

A structure of a mask for use in a lithography process in a semiconductor fabrication procedure is disclosed. The structure comprising: a mask base being made of transparent material; a plurality of patterns formed on said mask base, said patterns being used for generating an image on a wafer and being made of a conductive opaque material; and a conductive layer formed on said mask base and said plurality of patterns.

Structure of a mask for use in a lithography process of a semiconductor

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Hsin-Chu, Taiwan

Ming-Chu King