Rdc Semiconductor Co., Ltd.

Semiconductor Co., Ltd.

Ming-CHou Yen

Hsin-Chieh Lin

Chun-Wang Wei

Kun-Ying Tsai

Jui-Tai Ko

A signal processing apparatus comprising: a first gain-adjustable amplifier receiving the first input signal and generating a first output signal according to a gain; a first magnitude detector receiving the first output signal and generating a first magnitude signal; a first adder for subtracting the first magnitude signal from a reference value, thereby generating a first sampling signal; and a first weighting integrator receiving the first input signal, the second input signal and the first sampling signal, and generating the first integrated signal to control the gain of the first gain-adjustable amplifier.

Signal processing apparatus for processing time variant signal with first and second input signals comprising a weighting integrator, a magnitude detector and a gain-adjustable amplifier

A signal processing apparatus receiving a first input signal and the first input signal being directly used as a first output signal. The signal processing apparatus comprising: a first gain-adjustable amplifier receiving the first input signal and generating a gain-adjusted first input signal according to a gain; a first adder for subtracting the gain-adjusted first input signal from the second input signal, thereby generating a second output signal; and a weighting correlator receiving the first output signal and the second output signal, and generating the first integrated signal to control the gain.

Signal processing apparatus for processing time variant signal with first and second input signals comprising a weighting correlator and a first gain-adjustable amplifier

A signal processing apparatus comprising: a first gain-adjustable amplifier receiving the first input signal and generating a gain-adjusted first input signal according to a first gain; a first adder for subtracting the gain-adjusted first input signal from the second input signal, thereby generating a second output signal; a second gain-adjustable amplifier receiving the second input signal and generating a gain-adjusted second input signal according to a second gain; a second adder for subtracting the gain-adjusted second input signal from the first input signal, thereby generating a first output signal; and a weighting correlator receiving the first output signal and the second output signal, and generating the first integrated signal to control the first gain and the second gain.

Signal processing apparatus for processing time variant signal with first and second input signals comprising a weighting correlator and a first and second gain-adjustable amplifiers

A signal processing apparatus includes an adder and a weighting integrator. The adder receives a first input signal and an integrated signal, and generates a first output signal. The first output signal is obtained by subtracting the integrated signal from the first input signal. The weighting integrator receives the first output signal, and generates the integrated signal. The weighting integrator includes a weighting function generator, a multiplier, and an accumulator. The weighting function generator receives the first output signal. When the first output signal crosses a zero crossing point, the weighting function generator generates a weighting function. The multiplier performs a multiplication on the weighting function and the first output signal. The accumulator is connected to the multiplier for accumulating the product of the weighting function and the first output signal, thereby generating the integrated signal.

Signal processing apparatus for processing time variant signal

A DC offset cancellation circuit is provided. A first DC current and a first sensing current are superposed with each other to generate a first superposed current. A second DC current and a second sensing current are superposed with each other to generate a second superposed current. The first superposed current is converted into a first voltage signal. The second superposed current is converted into a second voltage signal. After the first voltage signal and the second voltage signal are received by a differential amplifier, an output signal is generated. The output signal is processed into a DC value. The DC value is converted into a DC current signal. The superposing unit generates the first DC current and the second DC current according to the DC current signal, so that the first superposed current and the second superposed current have the same DC offset.

DC offset cancellation circuit

A battery status indicating method for an electronic device is provided. The battery module is pluggable into the electronic device. When a residual electric quantity of the battery module is lower than a threshold electric quantity, the battery module stops outputting a battery voltage. The battery status indicating method includes steps of judging whether the battery module is in a plugged status or an unplugged status according to the battery voltage, periodically charging the battery module in a first time interval of a fixed cycle if the battery module is in the unplugged status, and judging whether the battery module is switched to the unplugged status according to a change of the battery voltage if the battery module is in the plugged status.

Battery status detection method and apparatus for electronic device

An active hybrid circuit for a full duplex channel generates a duplicated voltage at the current output stage to reduce the energy of the transmitter transmitted to the receiver. The active hybrid circuit cancels the energy of the transmitter transmitted to the receiver when it is operated in a full duplex channel with high-speed transmission. The active hybrid circuit for full a duplex channel comprises a transmit digital-to-analog converter for generating an analog transmit signal, a receive analog-to-digital converter for receiving an analog receive signal, a duplicated voltage digital-to-analog converter for generating a corresponding duplicated voltage according to the analog transmit signal of the transmit digital-to-analog converter, and a plurality of signal combiners for subtracting the duplicated voltage from the analog transmit signal to cancel the influence of analog transmit signal to the analog receive signal.

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Hsinchu, Taiwan

Ming-CHou Yen