Taiwan Semiconductor Manufacturing Comp. Ltd.

Ming-Chia Tai

Chao-Cheng Chen

Yuan-Sheng Huang

Chang-Yin Chen

Po-Chi Wu

Tzu-Yen Hsieh

Wen-Han Fang

Chun-Sheng Liang

Hsin-Che Chiang

Ju-Yuan Tzeng

Ming-Ching Chang

Ming-Hsi Yeh

Yu-Hsien Lin

Ju-Li Huang

Shun-Hui Yang

Chao-Hsuan Chen

Calvin Chiang

Ryan Chia-Jen Chen

Yu Chao Lin

Yu-Chao Lin

Ryan Chia-jen Chen

A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.

Fin field-effect transistor and method of forming the same

A method of applying and then removing a protective layer over a portion of a gate stack is provided. The protective layer is deposited and then a plasma precursor is separated into components. Neutral radicals are then utilized in order to remove the protective layer. In some embodiments the removal also forms a protective by-product which helps to protect underlying layers from damage during the etching process.

Semiconductor device and method of manufacture

A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate. The method includes forming a dielectric layer over the substrate, the first fin structure, and the second fin structure. The method includes forming a first work function layer in the first trench and the second trench. The method includes forming a first mask layer over the first work function layer in the first trench. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench and a second gate electrode in the second trench. The method includes forming a first hard mask layer in the first trench and a second hard mask layer in the second trench.

Semiconductor device structure with work function layer and method for forming the same

A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure over a substrate. The method includes forming a dielectric layer over the substrate and the first fin structure. The dielectric layer has a first trench exposing a first portion of the first fin structure. The method includes forming a first work function layer in the first trench. The method includes forming a first mask layer over the first work function layer in the first trench, wherein an upper portion of the first work function layer in the first trench is exposed by the first mask layer. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench.

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first fin structure and a second fin structure disposed over the substrate. The semiconductor device structure includes a first gate stack disposed over the substrate and overlapping the first fin structure. The first gate stack includes a first work function layer, a first gate electrode, and a first hard mask layer, the first gate electrode is over the first work function layer, the first hard mask layer is over the first gate electrode, the first gate electrode has a first convex top surface protruding beyond a first top surface of the first work function layer. The semiconductor device structure includes a second gate stack disposed over the substrate and overlapping the second fin structure.

Semiconductor device structure and method for forming the same

A semiconductor device structure is provided. The semiconductor device structure includes a substrate, a first fin structure and a second fin structure disposed over the substrate. The semiconductor device structure includes a first gate stack overlapping the first fin structure. The first gate stack has a first width. The first gate stack includes a first work function layer. A first top surface of the first work function layer is positioned above the first fin structure by a first distance. The semiconductor device structure includes a second gate stack disposed overlapping the second fin structure. The first width is less than a second width of the second gate stack. A second top surface of a second work function layer of the second gate stack is positioned above the second fin structure by a second distance. The first distance is less than the second distance.

A semiconductor device having metal gates and methods of forming the same are disclosed. The semiconductor device includes a substrate and a gate structure over the substrate. The gate structure includes a gate dielectric layer over the substrate, a barrier layer over the gate dielectric layer, an oxide layer over the barrier layer, and a work function metal layer over the oxide layer.

Method and structure for metal gates

A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.

Methods for forming a semiconductor device and a FinFET device are disclosed. A method comprises forming a dummy gate electrode layer over a substrate, the dummy gate electrode layer having a first height, forming a first etch stop layer on the dummy gate electrode layer, forming a first hard mask layer on the first etch stop layer, and patterning the first hard mask layer. The method further comprises patterning the first etch stop layer to align with the patterned first hard mask layer, and patterning the gate electrode layer to form a dummy gate electrode, the dummy gate electrode aligning with the patterned first etch stop layer, wherein after the patterning the gate electrode layer the first hard mask layer has a vertical sidewall of a second height, the second height being less than the first height, and the first hard mask layer having a rounded top surface.

FinFETs and methods for forming the same

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device, patterning a first hard mask to form a first recess in a high-resistor (Hi-R) stack, removing the first hard mask, forming a second recess in the Hi-R stack, forming a second hard mask in the second recess in the Hi-R stack. A HR can then be formed in the semiconductor substrate by the second hard mask and a gate trench etch.

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Zhubei, Taiwan

Ming-Chia Tai