Realtek Semiconductor Inc.

Sunplus Technology Co., Ltd.

Ming-Cheng Chiang

Li-Lung Kao

Jui-Cheng Huang

Chao-Cheng Lee

Yi-Chang Tu

Wei-Cheng Tang

Chia-Chi Tsai

Wei-Chou Wang

Su-Liang Liao

Yuan-Ping Hsu

Yan-Yu Lin

Chao-Wei Chang

An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.

Amplifier device

A circuit for driving a loudspeaker is disclosed. The circuit includes: a signal generator connected to the loudspeaker, generating a first signal comprising a first pulse with positive value and a second pulse with negative value; a detection circuit connected to the loudspeaker, detecting a second signal produced by the loudspeaker in response to the first signal; and a processing circuit connected to the signal generator and the detection circuit, calculating the impedance of the loudspeaker according to the second signal; wherein each pulse width of the first and second pulses is between 100 ns and 900 ns.

Circuit and method for driving a loudspeaker

An audio device includes a digital-to-analog converter, an amplifier, a speaker, a power management unit and a temperature sensor. The digital-to-analog converter is configured to convert a digital audio signal into an analog audio signal. The amplifier is coupled to the digital-to-analog converter and configured to amplify the analog audio signal and generate an amplified analog audio signal. The speaker is coupled to the amplifier and configured to broadcast the amplified analog audio signal. The power management unit is configured to provide the amplifier with a first working voltage and provide the digital-to-analog converter with a second working voltage. The temperature sensor is coupled to the speaker and configured to generate a temperature detection signal according to a temperature of the speaker. Wherein, the power management unit adjusts at least one of the first working voltage and the second working voltage according to the temperature detection signal.

Controlling voltage of a speaker based on temperature

A sampling circuit for sampling an input voltage and generating an output voltage, comprising six switches, a capacitor and a voltage buffer. The first switch has a control terminal and makes the output voltage equal to the input voltage when switching on. The second switch is coupled to a first terminal of the capacitor and a first level. The third switch is coupled to a second terminal of the capacitor and a second level. The fourth switch is coupled to the first terminal of the capacitor and the control terminal. The fifth switch is coupled to the control terminal and the second level. The voltage buffer has large input impedance, and has an input receiving the input voltage, an output providing a voltage equal or close to the input voltage. The sixth switch is coupled to the second terminal of the capacitor and the output of the voltage buffer.

Sampling circuit and sampling method

A converter with an additional DC offset includes a switch circuit, a first capacitor, a plurality of additional capacitor cells and an operational amplifier. The converter uses a first additional capacitor cell and a second additional capacitor cell having a capacitor difference with the first additional capacitor to store two charges having different polarity and magnitude with each other, and further generate an inverted DC offset according to a difference between the two charges to compensate a DC offset.

Converter with an additional DC offset and method thereof

The present invention discloses a gain control circuit capable of easing leakage current influence. According to an embodiment of the present invention, the gain control circuit comprises: at least one signal input end for receiving at least one input signal; a signal output end for outputting an output signal; an amplifier coupled between an amplifier input end and the signal output end; and a plurality of gain schemes. Each of the gain schemes is set between the at least one signal input end and the signal output end; and when one of the gain schemes is activated to generate the output signal, the rest gain schemes are inactivated to stop gain production and concurrently discharge leakage currents through their respective grounding paths.

Gain control circuit and method capable of easing leakage current influence

A multi-phase clock switching device includes a plurality of phase selection circuits. The phase selection circuit is used to receive a plurality of phase clock signals and determine how to output the phase clock signals to generate an output signal according to a switching signal. The phase selection circuit includes a selection unit and a protection unit. The selection unit receives at least a phase clock signal and determines how to output a phase clock signal according to the at least a phase clock signal and a selection signal. The protection unit determines how to generate the selection signal according to the phase clock signal and the switching signal.

Multi-phase clock switching device and method thereof

Hybrid digital-to-analog converter and method thereof are provided. The hybrid digital-to-analog converter (DAC) includes a data processor, at least one first type DAC, at least one second type DAC, and an output circuit. The data processor processes an input digital signal to output at least one of first and second digital signals which are related to a higher bit portion and a lower bit portion of the input digital signal, respectively. If the data processor outputs the first digital signal to the first type DAC, the first type DAC converts the first digital signal. The at least one second type DAC receives and converts the second digital signal outputted from the data processor. The output circuit receives at least one output signal of the first and the second type DACs to output an output analog signal.

Hybrid digital-to-analog converter and method thereof

A signal transceiving circuit, comprising: a receiver, for receiving a input signal; a transmitter, for transmitting an output signal; and a resistance circuit, for omitting the noise caused by the output signal to the input signal. The resistance circuit comprises: a voltage transferring circuit, for generating a voltage transferred signal, and a voltage dividing circuit, for voltage dividing the voltage transferred signal and the output signal, such that the voltage generated at the receiver is cancelled by the voltage generated by the voltage transferred signal at the transceiver. A noise reduction circuit that can be utilized in this signal transceiving circuit is also disclosed.

Signal transceiving circuit and noise reduction circuit

A soft-start circuit and a method thereof are described. The circuit includes an amplifier and a voltage ramp generator. The amplifier has a first input end, a second input end, an output end, and a power source control end. The first input end is coupled to a reference voltage. The second input end is coupled to a feedback voltage. The output end outputs an output voltage, and the feedback voltage corresponds to the output voltage. The voltage ramp generator is coupled to the power source control end, and generates a ramp-up voltage. When the ramp-up voltage is lower than a threshold value, the output voltage rises with the ramp-up voltage. When the ramp-up voltage is not lower than the threshold voltage, the output voltage remains at a stable value. A surge current occurring during smooth soft-start or even in operation is thus prevented.

Soft-start circuit having a ramp-up voltage and method thereof

A CAM includes first and second memory units. The first memory unit includes: a first data memory cell for storing a first data bit; a first comparison circuit for comparing a first search bit with the first data bit to determine if there is a match, and outputting a first comparison result; and a first CMOS logic circuit for performing a logic operation on the first comparison result and outputting a first matching result. The second memory unit includes: a second data memory cell for storing a second data bit; a second comparison circuit for comparing a second search bit with the second data bit to determine if there is a match, and outputting a second comparison result; and a second static CMOS logic circuit for performing a logic operation on the first matching result and the second comparison result, and outputting an output matching result.

Content-addressable memory

A content-addressable memory (CAM) comprises a first CAM cell and a second CAM cell. The first CAM cell stores a first data bit, and compares the first data bit with a first search bit to determine if they are matched. The second CAM cell stores a second data bit, and compares the second data bit with a second search bit to determine if they are matched. The first CAM cell comprises a first logic circuit, the second CAM cell comprises a second logic circuit, and the first logic circuit and the second logic circuit form a static CMOS logic circuit.

A line driver includes: a differential amplifier for amplifying an input signal to generate an output signal; first and second series resistors coupled respectively to output terminals of the differential amplifier and through which the output signal is output; first and second negative-feedback resistors each coupled between a respective input terminal and a respective output terminal of the differential amplifier; first and second positive-feedback variable resistors each coupled between a respective input terminal of the differential amplifier and a respective one of the first and second series resistors; and an adjusting unit coupled to the first and second positive-feedback variable resistors to adjust a resistance thereof with reference to the output signal.

Line driver capable of automatically adjusting output impedance

A gain-controlled amplifier is disclosed including: a set of switches; first and second transistors whose second terminals are coupled to each other via a resistive element; a first current mirror, coupled to a first terminal of the first transistor, for providing a set of first currents; a second current mirror, coupled to a first terminal of the second transistor, for providing a set of second currents; a first resistive network, coupled to the second terminal of the first transistor via a current source, for providing a first output signal; and a second resistive network, coupled to the second terminal of the second transistor via another current source, for providing a second output signal. Both the first and second resistive networks have a plurality of taps, coupling to either a first current or a second current through a switch of the set of switches.

Growing community of inventors

Hsinchu, Taiwan

Ming-Cheng Chiang