Au Optronics Corporation

Ming-Chang Shih

Kuei-Sheng Tseng

Tung-Chang Tsai

Lee-Hsun Chang

Jing-Ru Chen

Ya-Ling Hsu

Chen-Hsien Liao

Hsueh-Ying Huang

Yueh-Hung Chung

Gang-Yi Lin

Shi-Hao Li

Hsiang-Pin Fan

Wen-Pin Chen

Han-Ming Chen

Shi-Hao Lee

Shih-Chyn Lin

Chun-Jong Chang

Wen-Chen Lo

Wei-Jen Kao

Shao-Chun Cheng

Chuo-Hsien Lin

Chia-Kong Huang

Chao-Chin Wu

A display device includes a display array and a driving circuit. The display array includes at least one scan line. The driving circuit drives the display array and includes a timing controller and a gate driver. The timing controller controls a refresh rate of the display array at a first frequency or a second frequency, where the first frequency is higher substantially than the second frequency. The gate driver switches between supplying an enable voltage signal and a disable voltage signal to the scan line. Under the first or frequency, a corresponding first or second voltage difference exists between the enable voltage signal and the disable voltage signal. The first voltage difference is substantially greater than the second voltage difference, and the enable voltage signal has a same enable period.

Display device and driving method thereof

A compensation circuitry of gate driving pulse signal is adapted to receive a gate driving pulse signal and includes a pre-processing circuit, a peak detector, a discharge circuit, a voltage buffer and a charge pump circuit. The pre-preprocessing circuit performs a pre-processing operation to the gate driving pulse signal to adjust a voltage thereof. The pre-processed gate driving pulse signal then is transmitted to the peak detector for obtaining a peak voltage after a charging operation, and also is transmitted to the discharge circuit to determine whether to enable the discharge circuit so that providing the peak detector with a discharge loop when the discharge circuit is enabled. The charge pump circuit acquires the peak voltage through the voltage buffer and then modulates a waveform of the gate driving pulse signal according to the peak voltage. A display device using the above compensation circuitry also is provided.

Compensation circuitry of gate driving pulse signal and display device

A gate driver-on-array structure integrated into a display includes a substrate and a gate driver structure formed thereon. The gate driver structure is disposed in a peripheral region of the substrate. The gate driver structure includes a first layer metal pattern, a second layer metal pattern, and an insulating layer disposed therebetween. The first layer metal pattern includes connection nodes. The insulating layer has through holes exposing the connection nodes. The second layer metal pattern fills into the through holes and in contact with the connection nodes of the first layer metal pattern so as to implement necessary electrical connection of the gate driver structure.

Gate driver-on-array and method of making the same

An integrated touch panel has a display pixels arranged in a two-dimensional array of rows and columns connected to a plurality of gate lines and data lines. Each gate line receives a gate line signal for controlling the pixels in a row, and each data lines provides display data to the pixels in a column. The touch panel is connected to a sensing module having a plurality of shift registers connected in series. The touch panel has a plurality of sensor units arranged in sensor rows and sensor columns. Each sensor row receives gate line signals from a gate line, and each sensor column is connected to a sensor signal line for providing a touch signal to a shift register in the sensing module such that the shift registers connected to two adjacent sensor signal lines are separated by a different shift register is the series.

Integrated touch panel and method for making same

A gate driver on array of a display includes a substrate having a peripheral region, and a gate driver on array structure formed in the peripheral region. The gate driver on array structure includes a pull-down transistor, and the pull-down transistor has a gate electrode, an insulating layer, a semiconductor island, a source electrode, and a drain electrode. The semiconductor island extends out of both edges of the gate electrode, and extends out of an edge of the source electrode and an edge of the drain electrode.

Gate driver on array of a display

An active device array substrate includes a substrate, a pixel array, a peripheral circuit, and a number of marks. The substrate has an active area and a peripheral circuit area that is connected to the active area. The pixel array is disposed on the active area of the substrate. The peripheral circuit is disposed on the peripheral circuit area of the substrate. Besides, the peripheral circuit includes a number of driver bonding pads, a number of fan-out lines, and a number of connecting lines. The fan-out lines are electrically connected to the pixel array. Each of the connecting lines connects one of the driver bonding pads and one of the fan-out lines. Additionally, the connecting lines are arranged in different pitches. Each of the marks is disposed between two adjacent connecting lines.

Active device array substrate with plurality of marks in a peripheral area and liquid crystal display panel

In a method of making device of a display, an insulating layer, a semiconductor layer, an ohmic contact layer, a second conductive layer, and a photoresist pattern are consecutively formed on a first conductive structure. The photoresist pattern includes a first thickness region, and a second thickness region outside the first thickness region. The thickness of the second thickness region is smaller than that of the first thickness region. In addition, in a gate driver on array (GOA) of a display, it includes a gate driver on array structure with a pull-down transistor. The pull-down transistor has a gate electrode, a semiconductor island, a source electrode and a drain electrode. The semiconductor island extends out of the edges of the gate electrode, the source electrode, and the drain electrode.

Method of making device of a display

An organic electroluminescent display panel comprises a substrate, an anti-reflective layer, a light-shielding layer, a transistor and an organic light emitting diode. A method for fabricating said organic electroluminescent display panel comprises forming the anti-reflective layer on the substrate; forming the light-shielding layer with a first region and a second region on the anti-reflective layer; and then, removing at least part of the light-shielding layer to expose at least part of anti-reflective layer in the first region. After that, the transistor is formed above the light-shielding layer in the second region, and the organic light emitting diode is formed above the anti-reflective layer in the first region.

Organic electroluminescent display panel and method for fabricating same

An LCD panel including a first substrate, a second substrate, a black matrix, a liquid crystal (LC) layer, first photo spacers and second photo spacers is provided. The first and the second substrates are substantially parallel. The LC layer is disposed between the first and the second substrates. The black matrix disposed on the first substrate surrounds display regions and defines a non-display region. The first photo spacers contact the second substrate and are disposed on the black matrix. The second photo spacers are disposed on the black matrix. Channels are formed between the second photo spacers, such that LC molecules of the LC layer flow between the display regions through the channels. The width of the channels between any two of the adjacent second photo spacers substantially ranges from 2&#x2dc;10 &#x3bc;m. The dimension of the first photo spacers is substantially greater than that of the second photo spacers.

Liquid crystal display panel and manufacturing method thereof

A BM (black matrix) structure has a semiconductor layer and a light-shielding layer. The semiconductor layer has a first surface and a second surface. The light-shielding layer is disposed on the first surface of the semiconductor layer, and the second surface is an incident plane of environmental light.

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Hsin-Chu, Taiwan

Ming-Chang Shih