Samsung Display Co., Ltd.

Samsung Sdi Co., Inc.

Intellectual Keystone Technology LLC

Mgen.co,.ltd

Min Young Park

Ki Hyun Pyun

Jong Min Shim

Eun Jin Choi

Jeong Doo Lee

Yong Jae Lee

Young-Jin Kim

Sung Jun Kim

Min-Seok Oh

Sung-Jun Kim

Sang-Won Lee

Kyun Ho Kim

Seung-Jae Jung

Young-Su Kim

Byoung-June Kim

Jung-Tae Kim

Jong-Keun Kim

Dong-Seop Kim

Czang-Ho Lee

Yun-Seok Lee

Jang Hoon Kwak

Joon-Young Seo

Mi-Hwa Lim

Yun Mi Kim

Jun-Ki Hong

Cho-Young Lee

Doo-Youl Lee

Kyung-Hwa Lim

Nam-Kyu Song

Chan-Bin Mo

Young-Sang Park

Kyung Hwa Lim

Kyoung-Jin Seo

Hyun-Jong Kim

Byoung-Gook Jeong

Dong-seop Kim

Hoon-Ha Jeon

Yeon-Ik Jang

Chan-Yoon Jung

Ju Hyun Kim

Myung-Hun Shin

Dong Choi

Byoung-Kyu Lee

Yuk-Hyun Nam

A spectropolarimetric apparatus according to an embodiment of the present invention includes a light source attachment/detachment unit to which a light source is detachably coupled, a polarization interferometer configured to split light emitted from the light source coupled to the light source attachment/detachment unit into a plurality of polarized light beams using a polarization beam splitter and irradiate at least some of the split polarized light beams to a reflective sample to output the reflected light, and a spectrometer configured to measure physical properties of the reflective sample by analyzing the output light, wherein a wavelength of the light source coupled to the light source attachment/detachment unit varies depending on the reflective sample.

Spectroscopic polarimeter and device for automatically adjusting optical path difference

A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.

Clock data recovery circuit and display device including the same

A display device includes: a pixel unit including pixels connected to data lines and scan lines, and signal output lines, where at least one signal output line of the signal output lines is connected to each of the scan lines through a contact point; a data driver disposed at one side of the pixel unit to drive the data lines; a scan driver disposed at the one side of the pixel unit together with the data driver to drive the scan lines; and a timing controller controlling the data driver and the scan driver. The data driver includes: output buffers outputting data signals to the data lines, respectively; and a slew rate controller adjusting a slew rate of the data signals by controlling a bias value supplied to the output buffers in units of pixel rows based on positions of the pixels and a change in the data signals.

Display device and method for driving the same

A display device according to an exemplary embodiment includes: a display panel including a plurality of pixels; a plurality of source boards connected to the display panel; a power control board connected to the source board and configured to supply a power voltage to the plurality of pixels; and a control board configured to control an output of voltages supplied to the source board according to a control signal transmitted by the power control board.

Display device

According to an exemplary embodiment, a display device comprises: a display panel configured to include a plurality of pixels; a printed circuit board connected to the display panel; a connector mounted in the printed circuit board; and a cable fastened to the connector, wherein the connector comprises: a first connector mounted in the printed circuit board to include a first voltage pad, a second voltage pad, and a plurality of signal pads disposed between the first voltage pad and the second voltage pad; a hinge engaged with the first connector; and a second connector for rotation with respect to a hinge shaft, the second connector includes a third voltage pad and a fourth voltage pad, wherein the cable is inserted between the first connector and the second connector.

Connector and display device including the same

A display device may extract an edge of a data signal based on the data signal and phase conversion clock signals, extract a phase of the data signal based on the edge, and generate a clock phase calibration signal based on the phase of the data signal. The display device may calibrate a phase of a clock signal using the clock phase calibration signal that has a phase corresponding to the phase of the clock signal, thereby improving transmission characteristic of the signal.

Display device and method of driving the same

A timing controller includes: a data transmitter which transmits image data and a frame control signal to a data driver; a scan controller which transmits a scan start signal and a scan clock signal through scan control lines; and a memory interface which receives mode data from a control memory through a memory transmission line during a mode period, where the mode period is a period in which the scan controller does not transmit the scan start signal and the scan clock signal to the scan control lines.

Timing controller and display device including the same

A display device and a driving method thereof can reduce or prevent deterioration of image quality caused by ripples of a power voltage. A display device includes a gamma reference voltage generator generating a plurality of gamma reference voltages using a power voltage. A gamma selection signal generator generates a gamma selection signal corresponding to at least one gamma reference voltage among the gamma reference voltages and the power voltage. A gamma data supply unit stores a plurality of gamma data sets and outputs a gamma data set corresponding to the gamma selection signal from among the gamma data sets. A data driver generates a data signal using the gamma data set supplied from the gamma data supply unit and the gamma reference voltages. A display unit includes data lines transmitting the data signal.

Display device and driving method thereof suppressing power voltage ripples

There is provided a display device including an input unit configured to connect an external device to a serial peripheral interface (SPI) through a plurality of connection lines, a switching unit configured to connect the input unit and a flash memory of a driving board to the SPI, a data register configured to output connection setting data for determining a connection state of the switching unit, and a timing controller configured to output a control signal for determining the connection setting data according to an input of a write enable line among the plurality of connection lines.

A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.

Memory, display device including the same, and writing method of the same

A method of reducing a time for switching a gate line driving signal of display device having plural gate lines from a level that is less than a full gate-on level to the gate-on level is disclosed. The method may include: during a gate line pre-charging period of a respective gate line, causing the gate line driving signal to be at the full gate-on level; during a corresponding gate line main-charging period that follows the pre-charging period, causing the gate line driving signal of to be at the full gate-on level; and during an interposed period that is interposed between the gate line pre-charging period and its corresponding gate line main-charging period, causing the gate line driving signal to be at an intermediate level that is between the full gate-on level and an opposed gate-off level.

Display device including gate line driver and driving method thereof

A solar cell including a first conductive type semiconductor substrate; a first intrinsic semiconductor layer on a front surface of the semiconductor substrate; a first conductive type first semiconductor layer on at least one surface of the first intrinsic semiconductor layer; a second conductive type second semiconductor layer on a back surface of the semiconductor substrate; a second intrinsic semiconductor layer between the second semiconductor layer and the semiconductor substrate; a first conductive type third semiconductor layer on the back surface of the semiconductor substrate, the third semiconductor layer being spaced apart from the second semiconductor layer; and a third intrinsic semiconductor layer between the third semiconductor layer and the semiconductor substrate.

Solar cell

A photovoltaic device including a semiconductor substrate having a first surface and a second surface, the second surface being opposite to the first surface; a first passivation layer on the first surface; and a second passivation layer on the second surface, wherein each of the first passivation layer and the second passivation layer comprises an aluminum-based compound, is disclosed. A method of preparing a photovoltaic device, the method including: forming a semiconductor substrate to have a first surface and a second surface, the second surface being opposite to the first surface; forming an emitter region and a back surface field (BSF) region at the second surface; and forming a first passivation layer on the first surface and a second passivation layer on the second surface, wherein the first passivation layer and the second passivation layer are formed concurrently, is also disclosed.

Photovoltaic device

Growing community of inventors

Yongin-si, South Korea

Min Young Park