International Business Machines Corporation

Macronix International Co., Ltd.

Globalfoundries Inc.

Qimonda Ag

Beijing Baidu Netcom Science and Technology Co., Ltd.

Dow Global Technolgoies LLC

Chinese Academy of Sciences

University of Science and Technology Beijing

Min Yang

Meikei Ieong

Kevin K Chan

Alexander Reznicek

Dae-Gyu Park

Bruce Bennett Doris

Effendi Leobandung

Hsiang-Lan Lung

Paul Michael Solomon

Chun-Yung Sung

Victor Chan

Rajesh Rengarajan

Devendra K Sadana

Guy M Cohen

Kern Rim

Thomas Happ

Bipin Rajendran

Xinhui Wang

Leathen Shi

Kathryn Wilder Guarini

Young-Hee Kim

John Michael Hergenrother

Massimo V Fischetti

Pouya Hashemi

Huilong Zhu

Chung H Lam

Jeffrey W Sleight

Katherine Lynn Saenger

Alejandro Gabriel Schrott

Solomon Assefa

Yurii A Vlasov

William M J Green

MeiKei Leong

Edward J Nowak

Alfred Grill

Isaac Lauer

Kerry Bernstein

Shih-Hung Chen

Shreesh Narasimha

Ravikumar Ramachandran

Wilfried Haensch

Ramachandran Muralidhar

Matthew Joseph Breitwisch

Eric Andrew Joseph

Deborah A Neumayer

Yun-Yu Wang

Philip Joseph Oldiges

Michael F Lofaro

Zhibin Ren

Xinlin Wang

Qi Zhang

Diane Catherine Boyd

Thomas Safron Kanarsky

Ronnen Andrew Roy

Chieh-Fang Chen

Yue Ke

Victor W C Chan

Jakub Tadeusz Kedzierski

Hui Ren

Dennis L Rogers

Norma Edith Sosa

Amanda L Tessier

Annie Levesque

Xuetong Xue

Yu Zhang

Stephen W Bedell

Theodorus E Standaert

Haizhou Yin

Fei Liu

Laertis Economikos

Hongyu Chen

Huajie Chen

Kenneth Jay Stein

William J Cote

Masaharu Kobayashi

Jeremy Daniel Schaub

Dean Pan

Christopher V Baiocco

Helen Wang

Chang Yan Chi

Joel P Desouza

Wen Peng Xiao

Beilei Wang

Hu Liu

Cheng Cui

Shengen Zhang

Jianjun Tian

Yu Hang Gao

Yi Zhang

Kai Wei

Xiaomei Wu

Renhua Fan

Xiaomin Dou

Jeffery Sleight

Meikel Ieong

Phillip J Oldiges

Ys Suh

A method for retrieving an image is provided. The method includes: extracting a global feature and a local feature of an image to be retrieved, and a global feature and a local feature of an image to be recalled by employing a preset neural network model; determining a candidate image set by matching the global feature of the image to be retrieved with the global feature of the image to be recalled and matching the local feature of the image to be retrieved with the local feature of the image to be recalled; and determining a retrieval result from the candidate image set by performing local feature verification on the image to be retrieved and a candidate image in the candidate image set. An apparatus for retrieving an image, an electronic device, and a medium are further provided.

Method and apparatus for retrieving image, device, and medium

The present disclosure provides a method for identifying key point locations in an image. The method includes: obtaining an image to be detected, and obtaining a feature map and a saliency map of the image to be detected; generating a score response map of the image to be detected based on the feature map of the image to be detected; obtaining a first key point location of a key point on the score response map; obtaining a second key point location of the key point mapped on the image to be detected based on the first key point location; and correcting the second key point location based on the saliency map.

Method and apparatus for identifying key point locations in image, and medium

The present disclosure provides a logo picture processing method, apparatus, device and medium, and relates to technical field of image processing, and specifically to the technical field of artificial intelligence such as deep learning and computer vision. The logo picture processing method includes: obtaining a logo picture including: a current logo graph and current text information; performing text recognition on the logo picture to obtain the current text information; searching for a picture that matches both the current logo graph and the current text information, to obtain a matched picture. The present disclosure may improve the accuracy of the matched picture of the logo picture and thereby improve the logo picture recognition accuracy.

Logo picture processing method, apparatus, device and medium

A reaction system, such as for forming a rigid polyurethane foam, includes a flame retardant polyol that is a brominated reaction product of a cardanol component, a bromine component, and an additive component. The cardanol component includes at least 80 wt % of cardanol, based on the total weight of the cardanol component, and the bromine component including at least 80 wt % of bromine, based on the total weight of the bromine component.

Flame retardant polyol

Methods and devices are provided to fabricate semiconductor devices with, e.g., SiGe-on-insulator structures. For example, a method for fabricating a semiconductor device includes forming a crystalline buffer layer on a substrate, forming an epitaxial semiconductor layer on the crystalline buffer layer, patterning the epitaxial semiconductor layer to form a patterned epitaxial semiconductor layer, and oxidizing a surface region of the crystalline buffer layer selective to the patterned epitaxial semiconductor layer to convert the surface region of the crystalline buffer layer to an insulating layer. The insulating layer insulates the patterned epitaxial semiconductor layer from the crystalline buffer layer. In one example structure, the substrate is a silicon substrate, the crystalline buffer layer is formed of germanium, the epitaxial semiconductor layer is formed of silicon-germanium, and the insulating layer is formed of amorphous germanium-oxide.

Selective oxidation for making relaxed silicon germanium on insulator structures

Embodiments of the present invention provide semiconductor structures and methods for making the same that include a boron nitride (BN) spacer on a gate stack, such as a gate stack of a planar FET or FinFET. The boron nitride spacer is fabricated using atomic layer deposition (ALD) and/or plasma enhanced atomic layer deposition (PEALD) techniques to produce a boron nitride spacer at relatively low temperatures that are conducive to devices made from materials such as silicon (Si), silicon germanium (SiGe), germanium (Ge), and/or III-V compounds. Furthermore, the boron nitride spacer may be fabricated to have various desirable properties, including a hexagonal textured structure.

Low temperature spacer for advanced semiconductor devices

A method for fabricating a semiconductor device includes receiving a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, forming a gate structure over a fin that comprises a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and epitaxially growing a gate extender from the seed layer that laterally extends over a source or drain region of the fin. In one embodiment, a semiconductor device includes a finned substrate comprising an isolation layer with a plurality of semiconductor fins formed thereon, a gate structure formed over a fin of the plurality of fins, the gate structure comprising a gate and a seed layer disposed below the gate and immediately adjacent to the fin, and a gate extender epitaxially grown from the seed layer that laterally extends over a source or drain region of the fin.

Shallow extension junction

The present invention provides a semiconductor structure in which different types of devices are located upon a specific crystal orientation of a hybrid substrate that enhances the performance of each type of device. In the semiconductor structure of the present invention, a dual trench isolation scheme is employed whereby a first trench isolation region of a first depth isolates devices of different polarity from each other, while second trench isolation regions of a second depth, which is shallower than the first depth, are used to isolate devices of the same polarity from each other. The present invention further provides a dual trench semiconductor structure in which pFETs are located on a (110) crystallographic plane, while nFETs are located on a (100) crystallographic plane. In accordance with the present invention, the devices of different polarity, i.e., nFETs and pFETs, are bulk-like devices.

Dual trench isolation for CMOS with hybrid orientations

A gate structure is formed straddling a first portion of a plurality of semiconductor fins that extend upwards from a topmost surface of an insulator layer. A dielectric spacer is formed on sidewalls of the gate structure and straddling a second portion of the plurality of semiconductor fins. Epitaxial semiconductor material portions that include a non-planar bottommost surface and a non-planar topmost surface are grown from at least the exposed sidewalls of each semiconductor fin not including the gate structure or the gate spacer to merge adjacent semiconductor fins. A gap is present beneath epitaxial semiconductor material portions and the topmost surface of the insulator layer. A second epitaxial semiconductor material is formed on the epitaxial semiconductor material portions and thereafter the second epitaxial semiconductor material is converted into a metal semiconductor alloy.

Low resistance and defect free epitaxial semiconductor material for providing merged FinFETs

The invention belongs to the field of recycling of resources, in particular to a method for waste rare earth luminescent material by dual hydrochloric acid. First hydrochloric acid was used to dissolve the red phosphor powder (YO:Eu) priority, and yttrium-rich rare earth chloride solution and residue were obtained after filtered. Residue's major components were green and blue phosphor powder, and the removal of Cain filtrate was conducted by using NaSO, and CaSOprecipitation separation was conducted to get rich rare earth chloride solution, europium and yttrium. Residue was mixed with alkali to perform alkaline fusion at high temperature to decompose green and blue powder, then sodium aluminate, magnesium, barium and rare earth oxides were obtained. Alkaline fusion products were washed with water, and filtered, and then sodium aluminate solution and residues containing rare earth oxides were obtained.

Technologies of twice dissolved by hydrochloric acid for waste rare earth luminescent materials

A method for fabricating a semiconductor device includes receiving a gated finned substrate comprising an isolation layer with a semiconductor fin formed thereon and a gate formed over the semiconductor fin, depositing an atomic layer of dopant on a portion of the semiconductor fin that is laterally adjacent to the gate, forming a lateral spacer on a sidewall of the gate and above a gate extension portion of the atomic layer of dopant, and epitaxially growing a raised source or drain region on the semiconductor fin, that is laterally adjacent to the lateral spacer, from the atomic layer of dopant. The method may also include conducting a low temperature annealing process to diffuse the atomic layer of dopant to the raised source or drain region of the semiconductor fin. A corresponding apparatus is also disclosed herein.

3D atomic layer gate or junction extender

Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300&#xb0; C. and 750&#xb0; C. The dopant layer includes at least 4&#xd7;10active dopant atoms per cmthat react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.

FinFET field-effect transistors with atomic layer doping

Growing community of inventors

Yorktown Heights, NY, United States of America

Min Yang