Boe Technology Group Co., Ltd.

Microsoft Technology Licensing, LLC

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Beijing Boe Optoelectronics Technology Co., Ltd.

Beijing Sensetime Technology Development Co., Ltd.

Hewlett Packard Enterprise Development LP

Tsinghua University

Beijing Boe Technology Development Co., Ltd.

Hefei Boe Optoelectronics Technology Co., Ltd.

Hefei Boe Display Technology Co., Ltd.

Hewlett-packard Development Company, L.p.

Xiaomi Inc.

China University of Petroleum

Beihang University

Optis Cellular Technology, LLC

Min Wang

Jian Wang

Zhe Wang

Chao Tian

Chunhui Zhang

Haidong Zhang

Rui Li Xu

Rui Ma

Bing Jiang Sun

Shuo Li

Zheng Chen

Dong Wang

Gang Hua

Yingnong Dang

Shuai Liu

Chen Qian

Qiang Wang

Dongmei Zhang

Liguang Deng

Xiao Yang

Yang Yu

Benyu Zhang

Jing Yan Ma

Peng Zhao

Chunyang Nie

Wen Ji Huang

Lei Wang

Jing Wang

Fan Yang

Shipeng Li

Rui Fan

Jian Li

Ming Zhou

Jing Liu

Yuanyuan Liu

Hongjun Wang

Jianjun Wang

Yantao Li

Qingqing Ma

Wenli Zhu

Xianfeng Yuan

Shaobo Li

Yinan Gao

Hui Dong

Ji Zhao

Wentao Liu

Chunshui Zhao

Zejun Chen

Tong Yuan

Xiaoshi Liu

Guangquan Wang

Shen Huang

Jian-Tao Sun

Rui Gao

Huiming Wang

Xuanxuan Qiao

Xiuqin Yang

Chao Zhang

Tong Zhang

Yang Li

Yan Zhang

Hua-Jun Zeng

Xu Yang

Xiuyun Chen

Jian Zhao

Yongchun Lu

Jie Xu

Hongwei Li

Peng Sun

Ruifang Du

Ping Luo

Jiangtao Wen

Zhiyong Wang

Lingyu Sun

Weizhu Chen

Darren Keith Edge

Qi Sun

Fei Liang

Jingjun Du

Mingming Sun

Liang Cheng

Richard Harper

Rongcheng Liu

Fang Zhang

Yang Luo

Zhao Cao

Tingxiu Hou

Zhipeng Zhou

Dunbo Yu

Xiaohui Hou

Zhenyu Wang

Chao Zheng

Feifei Li

Lei Zhang

Peng Zhong

Weisheng Zhao

Xiaoyang Wang

Haoran Zhang

Shaoru Zhang

Wenwu Lu

An array substrate has a plurality of sub-pixel regions. The array substrate includes: a substrate; a first transistor and a second transistor that are disposed on a side of the substrate and located in each sub-pixel region; and a first pixel electrode and a second pixel electrode that are disposed on the side of the substrate and located in the sub-pixel region. The first pixel electrode and the second pixel electrode are insulated from each other; the first pixel electrode is electrically connected to the first transistor, and the second pixel electrode is electrically connected to the second transistor.

Array substrate and manufacturing method therefor, electronic paper display apparatus and driving method therefor

The present application relates to a quantum secure direct communication method and apparatus based on a one-way transmission, a device and a system. The transmitting terminal performs the error-correction anti-loss encoding on the to-be-transmitted message to obtain the code word corresponding to the to-be-transmitted message. The encryption key negotiated with the receiving terminal is adopted to encrypt the code word and the ciphertext message corresponding to the code word is obtained. Further, the ciphertext message is encoded onto the quantum state, and the obtained quantum state information is transmitted to the receiving terminal through the quantum channel.

Quantum secure direct communication method and apparatus based on one-way transmission, device and system

An electronic paper is provided. An array substrate in the electronic paper includes a base, as well as a pixel electrode, a thin film transistor, and a shielding electrode that are disposed on the base. An orthographic projection of an active layer in the thin film transistor on the base is within an orthographic projection of the shielding electrode on the base and is within an orthographic projection of the pixel electrode on the base.

Electronic paper and display device

Mouse

A display substrate, including: a base substrate; a plurality of gate lines and a plurality of data lines that intersect to surround a plurality of pixels; wherein each pixel includes a first thin film transistor, a second thin film transistor and a pixel electrode. A first electrode of the first thin film transistor is electrically connected to a pixel conductive layer of the pixel electrode, a second electrode of the first thin film transistor is electrically connected to a first electrode of the second thin film transistor, and a second electrode of the second thin film transistor is electrically connected to the data line. An orthographic projection of a combination of the second electrode of the first thin film transistor and the first electrode of the second thin film transistor on the base substrate at least partially overlaps with an orthographic projection of the pixel conductive layer on the base substrate.

Display substrate and method for manufacturing the same, display device

Methods of sequencing and producing nucleic acid sequences are provided. Accordingly there are provided methods of sequencing a nucleic acid sequence comprising L-nucleotides comprising subjecting the nucleic acid sequence comprising the L-nucleotides to a chemical sequencing method. Also provided is a method of reverse transcribing a ribose nucleic acid sequence into a deoxyribose nucleic acid sequence comprising catalyzing reverse transcription of the ribose nucleic acid sequence with aP2 DNA polymerase IV (Dpo4).

Methods of sequencing and producing nucleic acid sequences

A method for preparing low-background cement includes: uniformly mixing a seed crystal of cement, CAF whiskers, and high-magnesium raw material to yield a first mixture, calcining the first mixture at 1400-1500° C., to yield a low-background clinker, the first mixture including 1.0-5.0 wt. % of the seed crystal of cement, 1.0-5.0 wt. % of the CAF whiskers, and the balance is the high-magnesium raw material; and grinding a second mixture of the low-background clinker and gypsum, to yield low-background cement. The seed crystal of cement is a high-magnesium and low hydration heat clinker, has a specific activity of Ra-226 radioactive nuclides within 50 Bq/kg, and the MgO content of the clinker is between 4.0 wt. % and 5.0 wt. %, with 50 wt. %≤CS≤55.0 wt. %; and the high-magnesium raw material has a MgO content between 2.5 wt. % and 3.0 wt. %.

Method for preparing low-background cement

Electronic paper includes a display panel and a drive component. The display panel may include a plurality of pixels disposed in a display region and a photoelectric conversion transistor disposed in a non-display region. The drive component is electrically connected to the plurality of pixels, and is electrically connected to a current output terminal of the photoelectric conversion transistor.

A method for preparing Portland cement includes: respectively weighing iron slag, copper slag, vanadium slag, and nickel slag and grinding, to yield prefabricated iron slag, prefabricated copper slag, prefabricated vanadium slag, and prefabricated nickel slag; weighing mica and kaolinite, mixing, and grinding to obtain aluminous raw materials; evenly mixing the prefabricated iron slag and the aluminous raw materials, and calcining, to yield an iron-aluminum eutectic mineral; weighing the marble, fluorite, dolomite, and quartz, evenly mixing the marble, fluorite, dolomite, and quartz with the prefabricated copper slag, prefabricated vanadium slag, and prefabricated nickel slag to yield a first mixture; grinding the iron-aluminum eutectic mineral to yield powders, and calcining a second mixture of the first mixture and the powders, to yield the cement clinker; and cooling the cement clinker, and grinding a third mixture of the cooled cement clinker and the gypsum, to yield the Portland cement.

Method for preparing portland cement featuring early strength, low shrinkage, and low heat

The present disclosure provides a multi-bit memory cell, an analog-to-digital converter, a device and a method. The multi-bit memory cell comprises: a spin-orbit coupling layer and a plurality of magnetic tunnel junctions disposed on the spin-orbit coupling layer, the plurality of magnetic tunnel junctions comprising a plurality of first magnetic tunnel junctions; the plurality of first magnetic tunnel junctions are sequentially arranged along a length direction of the spin-orbit coupling layer, and critical currents of reversals of the magnetizations of free layers of the plurality of first magnetic tunnel junctions are progressively increased or decreased in sequence along the length direction. The present disclosure provides a multi-bit memory unit with simple manufacturing process and structure.

Multi-bit memory cell, analog-to-digital converter, device and method

A display module and a display device are provided in the embodiments of the present disclosure. The display module includes a display panel, the display panel includes a first surface and a second surface opposite to each other, at least one of the first surface and the second surface is a display surface, and the display module further includes an optical modulation structure arranged on at least one of the first surface and the second surface of the display panel. The optical modulation structure includes: a first transparent substrate and a second transparent substrate arranged opposite to each other, a charged particle arranged between the first transparent substrate and the second transparent substrate, and a first transparent electrode structure arranged between the first transparent substrate and the second transparent substrate and configured to form an electric field for driving the charged particle to move.

Display module and display device

Growing community of inventors

Beijing, China

Min Wang