Applied Materials, Inc.

Min Melissa Yu

David Wingto Cheung

Wai-Fan Yau

Gerald Z Yin

Yunsang Kim

Farhad K Moghadam

Judy H Huang

Claes H Bjorkman

Kuowei Liu

Dennis J Yost

Betty Tang

Hongquing Shan

Nasreen Gazala Chapra

A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Integrated low K dielectrics and etch stops

Integrated low k dielectrics and etch stops

A method of etching an organic dielectric layer on a substrate with a high etching rate and a high etching selectivity ratio. The organic dielectric layer comprises a low k dielectric material, such as a silicon-containing organic polymer, for example, benzocyclobutene. A patterned mask layer is formed on the organic dielectric layer , and the substrate is placed in a process zone of a process chamber . An energized process gas introduced into the process zone , comprises an oxygen-containing gas for etching the organic dielectric layer , a non-reactive gas for removing dissociated material to enhance the etching rate, and optionally, passivating gas for forming passivating deposits on sidewalls of freshly etched features to promote anisotropic etching. Preferably, during etching, the temperature of substrate is maintained at a low temperature of from about 15&deg; C. of 80&deg; C. to enhance the rate of etching of the dielectric layer. The etching method is particularly useful for forming interconnect plugs in vias etched through the organic dielectric layer by a dual damascene process.

Method for etching low K dielectric layers

Growing community of inventors

San Jose, CA, United States of America

Min Melissa Yu