Samsung Electronics Co., Ltd.

Alogics Co., Ltd.

Min-joong Rim

Sung-hyun Chung

Jae-min Ahn

Jeong-sang Lee

Hyung-Jin Choi

Jae-Min Ahn

Young-Uk Oh

Kwang-Seog Bae

Hyun-uk Shin

Young-Yong Lee

Provided is an interleaving method that can reduce error occurring during transmission at a receiving end in an Orthogonal Frequency Division Multiplexing (OFDM) system. According to the interleaving method, transmitted data bits are recorded in an interleaving memory; and the stored data bits are read based on a predetermined sequence to perform symbol interleaving, tone interleaving and cyclic shift simultaneously. Also, to simplify the logic of the OFDM system, the data bits transmitted from an interleaver go through Fast Fourier Transform (FFT) mapping, and the FFT mapped data bits are modulated. In short, the logic can be simplified by performing FFT mapping followed by modulation.

Interleaving method in OFDM system

An FFT apparatus for quickly processing input signals and method thereof is disclosed. In performing the FFT for processing N input signals, four N/4-point FFT units implemented by radix-2 single-path delay feedback (R2SDF) units performs the FFT with respect to the input signals, and a radix-4 computation unit performs a radix-4 computation with respect to the signals transferred from the N/4-point FFT units. Accordingly, the input signals are processed in parallel through the N/4-point FFT units, and thus a quick process of the input signals can be performed.

FFT apparatus for high data rate and method thereof

Disclosed are a method and apparatus for detecting minute oscillation in a WiBro repeater, and the WiBro repeater having the same. The method of detecting minute oscillation in a WiBro repeater includes: calculating an autocorrelation value of an input signal inputted to the repeater; calculating energy of the input signal; calculating the amount of oscillation by dividing the autocorrelation value by the energy; and comparing the amount of oscillation with a predetermined threshold value to determine whether or not the minute oscillation occurs in the repeater.

Method and apparatus for detecting minute oscillation and WiBro repeater having the same

There is provided a channel estimation apparatus for estimating a radio channel environment by multiplying a currently received bit signal of a pilot signal and previously received bit signals by weights, and summing the weighted currently received bit signal and the weighted previously received bit signals in a CDMA mobile communication system receiving the pilot signal comprised of a stream of bits having given bit values, and a power control signal comprised of power control bits. In the channel estimation, a predictor predicts a next bit signal succeeding the currently received bit signal, multiplies the predicted next bit signal by a weight, and generates a weighted next bit signal. A summer sums the weighted next bit signal from the predictor, the weighted currently received bit signal and the previously received bit signals.

Channel estimation apparatus and method

A data processing system for processing digital data comprises a first program bus for transferring a unit instruction, a second program bus for transferring a multi instruction consisting of unit instructions, a first program memory connected with said first program bus for storing the unit instruction, a second program memory connected with the second program bus for storing the multi instruction, and a process core for executing the unit or multi instruction fetched. The first and second program memories preferably have different bits widths. The process core includes an instruction input interface circuit for adding NOP instructions to a unit instruction fetched from the first program memory so as to form a multi instruction. The instruction input interface circuit preferably comprises an instruction converter for converting the unit instruction to the multi instruction by adding said NOP instructions, and an instruction selector for selecting the multi instruction generated from the instruction converter or another multi instruction fetched from the second program memory.

System for fetching unit instructions and multi instructions from memories of different bit widths and converting unit instructions to multi instructions by adding NOP instructions

A traceback-performing apparatus includes a first storing portion which receives and stores new path metric values and minimum path metric value so that the first input value is output later and the later input value is output first. A first trace logic portion which receives outputs of the first storing portion and the minimum path metric value and generates a first state which is the next state to be traced. A second storing portion which receives and stores the output of the first storing portion so that the first input value is output first and the later input value is output later. A second trace logic portion which receives the output of the second storing portion and the first state and generates a second state which is the next state to be traced. And, a third storing portion which receives and stores the second state so that the first input value is output later and the later input value is output first so as to find the decoded bits. Therefore, cost is saved in embodying the Viterbi decoder in a VLSI by reducing the required chip area, simplifying address-generation and eliminating the need for global interconnection.

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Seoul, South Korea

Min-joong Rim