Hyundai Electronics Industries Co. Ltd.

Min Hwahn Kim

Dong Woo Shin

Oh Bong Kwon

Jeong S Hyun

Kwon H Cha

Jae H Song

The present invention has been made in view of the above mentioned problem, and the present invention provides a sticky signal generator for rapidly generating a sticky signal with a small layout area which uses a shift register of which the size is equal to the size of the inputted operand data. In accordance with the present invention, there is disclosed a sticky signal generator including: a plurality of shifters for shifting an input data by a shifting width in response to at least one of shifting width control signal, wherein the size of the shifters is equal to the size of the input data, and the plurality of shifters are coupled serially to each other; a plurality of selectors for selecting and outputting the bits which are discarded by the shifters during shifting operation in response to the at least one of shifting width control signal, wherein each input terminal of the plurality of selectors are coupled to each of corresponding shifters; and a detector for determining if a bit of predetermined logic level is included in at least one of outputs from the plurality of selectors, and outputting a sticky signal in case the bit of predetermined logic level is included in at least one of the outputs.

High speed sticky signal generator

In a mixed voltage input buffer for managing mixed voltages in a semiconductor device which uses various voltages, includes a transmission unit for inputting a given signal and transmitting the input signal according to an enable signal, and a voltage level conversion unit for inputting an output signal of the transmission unit and converting its voltage level into a voltage level of an inner core power and then outputting it.

Mixed voltage input buffer

In accordance with the present invention, there is provided a dual channel FIFO circuit to perform bidirectional data transfer under the control of a host computer between a host interface and a small computer system interface, comprising: a first multiplexing means for selecting one of the data from said host interface and the data from said small computer system interface; a single ported SRAM for storing the selected data by said first multiplexing means and outputting the data, which are indicated by pointers, according to the requests from said host interface or said small computer system interface; a second multiplexing means for selecting one of the data from said single ported SRAM and the data from said small computer system interface; a first staging memory means for storing the data to be outputted to said host interface; and a second staging memory means for storing the selected data by said second multiplexing means and transferring them to said second multiplexing means and said small computer system interface.

Dual channel FIFO circuit with a single ported SRAM

A digital/analog conversion apparatus with a color palette RAM for a multimedia, comprising a first latch circuit for inputting a pixel address signal, a pixel mask register for selectively masking the pixel address signal from the first latch circuit in response to a control signal from a microprocessor interface circuit, a second latch circuit for storing digital color information temporarily, and first to third digital/analog converters for converting the digital color information from the second latch circuit into analog R, G and B color information. The palette RAM stores digital color information from the microprocessor interface circuit and outputs the digital color information stored in its location corresponding to the pixel address signal from the pixel mask register to the second latch circuit. The apparatus also comprises first to third switching circuits for inputting the digital color information from the color palette RAM, digital video color information from an external video medium and external digital color information from a pixel address signal input line and selectively outputting the inputted information in response to external first to third control signals, and a third latch circuit for transferring the output information from the second switching circuit to a digital color information output terminal.

Growing community of inventors

Ichonkun, South Korea

Min Hwahn Kim