Via Technologies, Inc.

Min-Hung Chen

Jiin Lai

Kuan-Jui Ho

Chau-Chad Tsai

Sheng-Chang Peng

Hsiou-Ming Chu

Meng-Cheng Ku

Huei-Li Chou

The present invention relates to a method for configuring a Peripheral Component Interconnect Express (PCIE). A plurality of PCIE parameters are stored in a storage unit. When a computer system starts up, a North Bridge chip is driven to read the PCIE parameters in the storage unit for configuring the PCIE. According to the configuration method of the present invention, when the computer system starts up, the North Bridge chip and the storage unit are enabled first. Then, the North Bridge chip is driven to read the PCIE parameters. Finally, the North Bridge chip proceeds with initialization according to the PCIE parameters to configure PCIE.

Method for configuring a Peripheral Component Interconnect Express (PCIE)

A processing method, a chip set and a controller for supporting message signaled interrupt. A memory write transaction on a PCI bus is monitored. When the address of the system memory specified in the interrupt message of the write transaction is located at a range of a reserved interrupt address, the interrupting service sequence is performed. The reserved interrupt address is located in an address of a system memory. Thus, the data to be processed and the system-specified message are written in the buffer and arranged in sequence. The problem of 'write buffer latency' is resolved, and is irrelevant to the level of the PCI bus. Many system specified messages can be stored in the system memory, so that multiple system message signaled interrupts issue from different peripheral components can be processed in the same interrupt service routine.

Processing method, chip set and controller for supporting message signaled interrupt

Growing community of inventors

Hsin-Tien, Taiwan

Min-Hung Chen