Industrial Technology Research Institute

Min Chuan Wang

Chih Sheng Lin

Keng Li Su

Wei Chun Chang

The present invention relates to a memory accessing circuit, which is for accessing a memory circuit with 2impedance states. The memory accessing circuit includes a testing signal generating circuit, for generating a testing signal by detecting the impedance state of the memory circuit; a reference signal generating circuit, for generating 2reference signals by detecting the impedance states of a reference circuit having 2impedance paths; a median signal generating circuit, for generating (2)&#x2212;1, median signals by receiving the 2reference signals; and a comparing circuit, for comparing the testing signal and the (2) median signals. The present invention further provides a memory accessing method thereof.

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Taichung, Taiwan

Min Chuan Wang