Cypress Semiconductor Corporation

Creator Technology B.v.

Microsoft Technology Licensing, LLC

Parade Technologies, Ltd.

Min Chin Chai

Tao Peng

Patrick N Prendergast

Igor Polishchuk

Fred Keiser

Massoud Badaye

An embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace that intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to a corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. The capacitive sensor array may further comprise a plurality of open zones, where each of the plurality of open zones is staggered relative to an adjacent open zone.

Asymmetric sensor pattern

A sensor array includes a first sensor element of a unit cell and a second sensor element of the unit cell. The unit cell includes core traces of the first sensor element, where the core traces are the widest portion of the first sensor element. The unit cell includes main traces of the second sensor element and subtraces of the second sensor element, where each main trace crosses the first sensor element at a corresponding bridge to form an intersection of the unit cell.

Lattice structure for capacitance sensing electrodes

A self-shielding capacitive sensor array may include a first plurality of sensor elements and a second plurality of sensor elements, where each of the second plurality of sensor elements intersects each of the first plurality of sensor elements, such that each of the first plurality of sensor elements may be capacitively coupled with each of the second plurality of sensor elements. The first plurality of sensor elements may be configured to shield each of the second plurality of sensor elements from a noise source.

Self shielding capacitance sensing panel

A capacitive sense array configured to improve edge accuracy in detecting a presence of a conductive object is described. In one embodiment, a capacitive sense array includes at least a first set of sense elements having non-homogenous pitches disposes in a first longitudinal axis of the capacitive sense array. The pitch includes width of the sense elements and spacing between the sense elements.

Edge accuracy in a capacitive sense array

One or more input location correction tables are used to compensate for interference introduced into input panels and generate a corrected location based on a sensed location of the input panel. The one or more input location correction tables can include a coarse table and a fine table that stores mappings of intermediate locations mapped to by the coarse table having an accuracy that fails to satisfy a threshold coordinate accuracy. Different environments in which computing device can be situated can result in different interference being introduced, and the one or more input location correction tables can be updated based on the current environment to compensate for the interference introduced in the current environment.

Input location correction tables for input panels

One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. Within each unit cell, the second sensor element may comprise at least one primary subtrace branching away from the main trace.

Growing community of inventors

Lynnwood, WA, United States of America

Min Chin Chai