General Electric Company

Milton D Bloomer

John D Harnden, Jr

William P Kornrumpf

Victor D Roberts

George Jernakoff

Henry A Rocha

Francois D Martzloff

Joseph L Ciccone

Donald P Shattuck

Denise A Deallenbach

A load is provided, at all times when in operation, with a D.C. voltage having at least a minimum holding magnitude by: providing a source voltage having a peak magnitude greater than the holding magnitude; connecting the source voltage to the load only while the source voltage magnitude is greater than a preselected magnitude; charging from the peak source voltage magnitude an energy storage element while the load is connnected to the source voltage; energizing the load from the charged energy storage element whenever the source voltage magnitude is less than the preselected magnitude; increasing the effective impedance of the load whenever the load is energized by the storage element; and selecting the energy storage element to provide at least the holding voltage to the load during each time interval when the energy storage element is connected to the load. An apparatus for providing a load voltage greater than a desired minimum voltage, but less than the peak voltage of a full-wave-rectified AC signal waveform, is described.

Reduced requirement energy storage for load having non-zero minimum

A circuit for the commutated turn-off of latched power switching devices, such as of the insulated-gate transistor/insulated-gate rectifier type, monitors the gate drive voltage and a load-current-related parameter (e.g. the collector/anode voltage) of the at least one power switching device connecting a load to a source. Comparator outputs provide logic signals indicating whether the at least one switching device has latched or has turned off in normal manner, responsive to cessation of gate drive. Circuitry for providing a cyclic gate drive signal is enabled whenever a latched condition is detected. The cyclic signals occur until the latched device is actually turned off, at a driven-unlatching current typically one-half the device latching current and typically at least an order of magnitude greater than the current at which the device will undergo self-unlatching turn-off.

Circuit for self-commutated turn-off of latched devices, such as of the

Multiplexing apparatus interconnects at least one power switching device, itself connected to a load for controlling of flow of current through that load from an AC source, with a control circuit for controlling conduction of the switching device(s). The multiplexing apparatus uses a full-wave rectifier for providing both half-cycles of the source AC signal waveform, transformed to have a common preselected polarity, with a first DC level to obtain zero crossing information for determining the start of switching device conduction. The same comparator is utilized with a level switch, now providing a second DC level, and a resistive divider for attenuating the voltage across the conducting switching device by a known factor, for monitoring the switching device saturation voltage during conduction. The apparatus may also include a power supply subcircuit, for providing an operating potential to a completely integrated semiconductor circuit containing this apparatus.

Reverse phase-control apparatus for multiplexing interconnections

A system for measuring currents flowing through a conductor uses the current-carrying conductor itself as the measurement shunt. The voltage developed across the inherent resistance of a fixed length of current-carrying conductor is measured and scaled to provide a displayable voltage of magnitude equal to the magnitude of current flowing in the conductor. Compensation for conductor temperature rise can be utilized, as can a multimeter accommodating various conductor materials and/or sizes.

Current-shunt system for known conductors

A soft-starting phase-control circuit for controlling both the cold in-rush and normal operating flows of current through a load from an A.C. source. The load may be resistive, may have a non-zero resistance temperature coefficient and may require a load voltage thereacross lower than the voltage provided by the A.C. source connected to the load and the control circuit. The control circuit utilizes at least one power switching device for selectively enabling and disabling the connection between source and load responsive to turn-on and turn-off states of a control signal provided at the output of a gate subcircuit. The gate subcircuit provides a turn-on state at a time, after each zero crossing, variably responsive to either a sensed load parameter when the load is in the normal operating condition, or to a selected starting sequence each time the load is initially energized (either intentionally or responsive to recovery from a detected fault condition) to limit in-rush current to a relatively low multiple of the normal operating current. The start-up sequence of load turn-on states is responsive to gate enabling signals provided by comparison of a reference level with the instantaneous magnitude of a ramped signal, itself terminated and restarted at each line zero crossing. Only if a phase-locked loop has been synchronized to the source line voltage zero crossings can the gate means be driven to the turn-on state. The exact time when the ramp signal reaches the reference level is controlled by integration of the sum of the outputs of selected ones of a plurality of current sources.

Soft-starting phase-control circuit for low voltage load

A sample of the voltage magnitude across a load, connected in series with an A.C. source and a load-current-flow-control subcircuit, is taken during at one of the time intervals when load current flows during a source waveform cycle. The sampled load voltage is compared to a reference level and the difference in magnitude between the sampled and reference voltages is integrated, with respect to time, to provide an adjustment signal. The adjustment signal is provided to a subcircuit for timing the conduction period of the load-current-flow-control subcircuit, by varying the conduction-termination time after each conduction-commencement (at each source waveform zero-crossing) to vary the selected one of the half-cycle-average (mean absolute deviation--MAD) or RMS voltage magnitude across the load to a value such that the sampled load voltage magnitude is substantially equal to the selected reference voltage magnitude. Several presently preferred embodiments are described for controlling the load magnitude in accordance with this method.

Method of and apparatus for half-cycle-average or R.M.S. load voltage

A circuit for preventing excessive power dissipation and for avoiding latch-up, in power switching semiconductor devices, monitors the forward conduction drop of the switching semiconductor device and removes the control electrode drive signal provided thereto, if the drive signal is insufficient for supporting the load current flowing through the driven device. The voltage across the controlled-conduction portion of the switching device is monitored and compared to a reference voltage, which may be also related to the load current, to remove switching device drive if the controlled-conduction portion voltage exceeds the reference comparison voltage.

Circuit for preventing excessive power dissipation in power switching

Methods and circuitry for the controlled switching of non-regenerative power semiconductors to provide for a less rapid rate-of-change of load current while the power semiconductor is in its active region, thereby reducing electromagnetic interference. Methods and circuitry for the controlled turn-on with fast turn-off, controlled turn-off with fast turn-on or controlled turn-on and controlled turn-off of voltage-controlled and current-controlled semiconductors, with either load voltage (dV/dt) or load current (dI/dt) feedback are described.

Controlled switching of non-regenerative power semiconductors

A reverse-phase-control power switching circuit provides for controlling the flow of current through a load, from an A.C. source, and includes circuitry for limiting the in-rush current for a load having a variation of resistance due to initial turn-on phenomenon. Load current is enabled to flow at each zero crossing of an A.C. source, connected in series with the load and the switching circuit of the present invention. Load current is terminated at a time, prior to the next source waveform zero crossing, to either maintain a substantially constant current conduction angle for a load with a substantially-constant steady-state resistance, or to limit load instantaneous current to a maximum level, set to a value somewhat greater than the desired normal load current, during low-load-resistance in-rush time intervals.

Reverse-phase-control power switching circuit and method

A pair of comparators, each having the same reference potential at a first input, each have a second input alternatingly receiving different ones of first and second signals relating to the magnitude of a parameter to be controlled. The results of a first comparison, with a first parameter signal connected to the input of the first comparator and the second comparator receiving the remaining parameter signal, is commutated by comparator output circuitry to means for realizing the algebraic difference of the signals and for intermediately storing this difference. During a second sampling period, when the inputs are reversed, the algebraic difference circuitry provides another set of signals to the intermediate storage circuit, which second set of signals have parametric changes of opposite direction and substantially equal magnitude to errors introduced by the comparators during the first sampling, such that the intermediately-stored algebraic difference of the two sample sets is substantially free of any effects due to input offset and other errors between the pair of comparators.

Alternating comparator circuitry for improved discrete sampling

A current sensor, responsive to the first power of a current to be measured, utilizes a piezoelectric element located between a current-carrying conductor and a permanent magnet having its north-south poles aligned normal to the direction of current flow through the conductor. The substantially constant magnetic field provides a sensor output, taken from electrodes upon opposite surfaces of the piezoelectric member, which is proportional to the first power of current flowing in the single conductor.

Current sensor

A protection circuit for a capacitively ballasted load provides decreased load current in the event of a circuit arc. The A.C. load current is measured at a time shortly after a load current zero crossing; if a non-zero load current is present, the load is operating normally and no action is taken, whereas if the load current remains at an essentially zero magnitude, indicative of circuit arcing conditions, normal load operation is inhibited.

Protection circuit for capacitive ballast

High voltage transients are effectively clamped by means of a spark gap, in parallel connection with a load to be protected, and having a capacitor in series with the parallelled load-spark gap combination. The series capacitor limits follow-through current through the spark gap to a level permitting survival of the spark gap. Where the load is an incandescent lamp, the spark gap is formed by shaping the lamp internal lead structure, such that an additional external spark gap component is not required.

Current-limited spark gap for transient protection

A phase control circuit, for energizing lower voltage loads and the like from a higher voltage A.C. source, utilizes power switching means in series with the load across the source. The load voltage and current are sampled and compared to reference values to determine if the load resistance is less than or greater than a desired value and the output voltage of an integrator is adjusted accordingly. The integrator output voltage establishes the time, after each source waveform zero crossing, at which the power switching device enables load current flow. A reset circuit prevents the power switching device from conducting in the event that a line zero crossing is not properly detected, to preclude damage to the switching device and/or load overvoltage. A circuit is also provided for gradually increasing load current at start-up to limit inrush currents to the load.

Phase control circuit for low voltage load

A load resistance control circuit compares the actual value of a non-zero temperature coefficient load resistance to a desired load resistance magnitude, and generates a control signal varying as a function of the deviation of the actual load resistance from the desired resistance. A fixed portion of each of the load voltage and load current are sampled and compared to references, set such that the sampled portions will each be equal to an associated reference value, at the same time, if the load resistance is of the desired magnitude. An analog comparator can be used to add or remove charge to or from an integrating capacitor responsive to the actual load resistance being different from the desired load parameter. In a digital embodiment, a counter is incremented or decremented responsive to the actual load resistance differing from a desired value. The capacitor voltage or digital count then is used to affect a load resistance change, as, e.g. by establishing the time during which an additional load current, added to a constant load current, is allowed to flow through the load to change the load resistance. The constant load current and additional load current values are selected such that normal load operation requires at least some flow of additional load current, to place normal load current within the operational range of the load resistance control circuit.

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Scotia, NY, United States of America

Milton D Bloomer