Infineon Technologies Ag

Qimonda Ag

Milena Dimitrova

Heinz Hoenigschmid

Corvin Liaw

Michael Angerbauer

Gerhard Mueller

Michael Markert

An integrated circuit having a resistance-based or resistively switching memory cell, and a method for operating a resistively switching memory cell is disclosed. One embodiment is adapted to be put in a low-resistance state by applying a first threshold voltage and in a high-resistance state by applying a second threshold voltage, wherein reading out of the data content from the memory cell is performed by applying a voltage to the memory cell in the range of the first or second threshold voltage or a higher voltage.

Integrated circuit having a resistively switching memory and method

The present invention relates to a memory circuit and method of operating the same. In at least one embodiment, the memory circuit includes a resistive memory element coupled to a plate potential by a first terminal; a bit line which is connectable to a second terminal of the resistive memory element; a programming circuit operable to change the resistance of the resistive memory element; a bleeder circuit operable to provide a bleeding current to or from the bit line due to a change of the resistance of the resistive memory element caused by the programming circuit.

Memory circuit including a resistive memory element and method for operating such a memory circuit

A memory device and method of operating the same. In one embodiment, the memory device includes a resistive memory cell including a resistive memory element wherein the resistive memory element is designed to acquire a low resistance state when applying a programming voltage and acquire to a high resistance state when applying an erasing voltage; and wherein the writing time for changing the resistance state of the resistive memory element can be relatively reduced.

Resistive memory device and method for writing to a resistive memory cell in a resistive memory device

The invention relates to a method for reading a memory datum from a resistive memory cell comprising a selection transistor which is addressable via a control value, the method comprising detecting a cell current flowing through the resistive memory cell, setting the control value depending on the detected cell current, and providing an information associated to the control value as a memory datum.

Method and memory circuit for operating a resistive memory cell

A method and a circuit configuration for generating a reference voltage in a resistive semiconductor memory includes generating a reference voltage by connecting together two bitlines having different voltages. This method for generating a reference voltage can be used in a method and in a circuit configuration for reading at least one memory cell of a resistive memory cell array in a semiconductor memory. The generated reference voltage and a voltage dependent on the content of a resistive memory cell are applied to an amplifier to determine the content of the memory cell. The content of the memory cell is determined dependent on a relationship between the reference voltage and the voltage dependent on the content of the memory cell.

Growing community of inventors

Munich, Germany

Milena Dimitrova