Stmicroelectronics Gmbh

Texas Instruments Corporation

Stmicroelectronics International N.v.

Milad Alwardi

Deyou Fang

Yamu Hu

David C McClure

Chao-Ming Tsai

James Leon Worley

Pavan Nallamothu

David McClure

Zhengyu Wang

According to an embodiment, a circuit is proposed for generating rate and quadrature demodulation signals, incorporating unidirectional hysteresis for negative edges. The circuit features a preliminary stage that amplifies the differential sinusoidal signal from gyroscopic proof mass oscillations; a gain stage for boosting this signal with adjustable hysteresis levels; an output stage delivering a full-swing square wave output; and a customizable offset component to deepen the drop in the non-inverting compared to the inverting signal for the third signal's falling edge.

Precision rate demodulation for a vibrating gyroscope

A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

MEMS gyroscope control circuit

Disclosed herein is a device including a MEMS sensor configured to generate a first differential capacitance representing a change in capacitance from a first original sensing capacitance value and a second differential capacitance representing a change in capacitance from a second original sensing capacitance value, with the first and second original sensing capacitance values being mismatched. A compensation circuit is configured to generate outputs for compensating the first and second differential capacitances for the mismatch. A capacitance to voltage converter receives the first and second differential capacitances and the outputs of the compensation circuit as input and generates an output voltage as a function thereof.

Cancellation of noise due to capacitance mismatch in MEMS sensors

A DAC may include a decoder configured to receive a digital input signal, and first and second sub-DACs coupled in parallel to the decoder, each of the first and second sub-DACs having first and second LSB banks, and an MSB bank coupled between the first and second LSB banks. The decoder may be configured to selectively control the first and second LSB banks, and the MSB bank based upon the digital input signal. The DAC may include an output network coupled to the first and second sub-DACs and configured to generate an analog output signal related to the digital input signal.

DAC with sub-DACs and related methods

A clock detector is provided. The clock detector generally comprises a filter, a first branch, a second branch, a latch, and logic. The filter is adapted to receive a clock signal and is coupled to a low threshold inverter in the first branch and a high threshold inverter in the second branch. The latch is adapted to receive the clock signal and is coupled to the first branch, while the logic is coupled to the node between the first branch and the latch, an output of the latch, and the second branch so that it can output a clock detection signal.

Passive clock detector

An apparatus receives an indicating signal representing a parameter at a monitoring locus and includes: (a) A first measuring unit having a first input coupled for selectively receiving the indicating signal and presenting a first output signal that includes a first monitoring signal representing change in the indicating signal during a first time interval and a first benchmark signal indicating change imparted to signals by the first measuring unit. (b) A second measuring unit having a second input coupled for selectively receiving the indicating signal and presenting a second output signal that includes a second monitoring signal representing change in the indicating signal during a second time interval and a second benchmark signal indicating change imparted to signals by the second measuring unit. (c) An accumulating and indicator unit coupled for receiving and evaluating the first and second output signals and generating an indicator signal that represents the evaluating.

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Allen, TX, United States of America

Milad Alwardi