Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Mikiya Uchida

Yoshiyuki Matsunaga

Ken Mimuro

Takumi Yamaguchi

Makoto Inagaki

Mitsuyoshi Mori

Hiroyoshi Komobuchi

Kimiya Ikushima

Kazuo Fujiwara

Mototaka Ochi

Ryohei Miyagawa

Asako Baba

Hirohisa Ohtsuki

Motonari Katsuno

Emi Kanazaki

Emi Ohtsuka

Sougo Ohta

Chinatsu Seto

Kenichi Mimuro

A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.

Solid state imaging apparatus and method for fabricating the same

A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.

Solid-state imaging apparatus and method for producing the same

An integrated circuit includes: a semiconductor substrate that has a well region containing a first conductivity type impurity; and an enhancement type MOS transistor and a plurality of depletion type MOS transistors, each of which is formed in the well region and has a channel region under a gate electrode. At least one of the depletion type MOS transistors has, in the channel region, an implantation region into which a second conductivity type impurity is implanted so that a threshold voltage is adjusted. The implantation region has the first conductivity type impurity and the second conductivity type impurity. Further, the second conductivity type impurity has a concentration that is higher than a concentration of the first conductivity type impurity.

Integrated circuit and method of manufacturing the same

In a MOS-type solid-state imaging devicein pixelstoin which lines in an upper layer (charge transfer linesto) are formed in shifted positions located toward a center Lof an image area, each two oppositely disposed pixels with the center Lof the image area sandwiched therebetween, such as a pixeland a pixelhave the following relation. In each of the pixelsandpower supply linesandvertical signal linesandand charge transfer linesandrelating to each of the pixelsandare arranged symmetrically with respect to an imaginary plane extending from the center Lof a sensorin a direction orthogonal to the drawing page in an X-axis direction.

Solid-state imaging device having a plurality of lines formed in at least two layers on semiconductor substrate

An N-type epitaxial layer, which is formed above an N-type semiconductor substratein each of a pixel region and a peripheral circuit region; a first P-type wellformed above the N-type epitaxial layerin the pixel region; and light receiving regions, which are formed within the first P-type welland each of which is a component of a photodiode, are included. The peripheral circuit region includes: second P-type wells, which are formed from a surfaceof the peripheral circuit region to a desired depth and each of which is a component of an N-Channel MOS transistor; an N-type wellwhich is formed from the surfaceof the peripheral circuit region to a desired depth and which is a component of a P-Channel MOS transistor; and a third P-type wellwhich is formed so as to have such a shape as to isolate the N-type wellfrom the N-type epitaxial layerand which has a higher impurity concentration than that of the first P-type well

MOS solid-state image pickup device and manufacturing method thereof

The semiconductor device of the present invention includes a bootstrap circuit, the bootstrap circuit including: a selection transistor composed of an n-channel MOS transistor; a booster transistor of which a gate is connected to a drain of the selection transistor; and a boosting circuit that is connected between the gate and a source of the booster transistor, and boosts gate voltage with respect to the source of the booster transistor, wherein gate dimensions of the selection transistor are smaller than gate dimensions of the booster transistor. According to this configuration, the semiconductor device can realize increasing an action of a circuit, decreasing a chip size and simplifying processes.

Semiconductor device

In the present invention, an etching holeis formed in a polysilicon filmas a cavity-wall member. Through the etching hole, hydrofluoric acid is injected, so as to dissolve a silicon oxide film, thereby forming a cavity. In the cavity, a detecting unitof a sensor is in an exposed condition. Next, by sputtering, an Al filmis deposited in the etching holeand on an upper face of a substrate. Thereafter, a portion of the Al filmpositioned on the polysilicon filmis removed by etching back, thereby leaving only a metal closureof Al which closes the etching hole. The sputtering step is performed under a pressure of 5 Pa or less, so that the pressure in the cavity can be held to be low.

Electronic device and method of manufacturing the same

A solid-state imaging device including: a plurality of photosensitive cells, each having a photodiode, arranged on a semiconductor substrate () in a matrix; and a peripheral driving circuit that has a plurality of transistors for driving the plurality of photosensitive cells. The plurality of transistors includes a first transistor and a second transistor, the first transistor having a first diffusion layer () as a source or a drain where a signal potential corresponding to a signal charge generated by the photodiode is transmitted and held, and the second transistor having a second diffusion layer as a source and a drain where the signal potential is not transmitted. An edge interval (D) between an edge of a metal silicide layer () formed on a surface of the first diffusion layer and an edge of a gate electrode () in the first transistor is larger than an edge interval between an edge of a metal silicide layer formed on a surface of the second diffusion layer and an edge of a gate electrode in the second transistor. It is possible to suppress a leakage current in the transistors in the peripheral driving circuit, and to hold picked-up image information with high accuracy.

Solid-state imaging device

A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region. First, second and third regions are formed on a surface portion extending from the photodiode region to the drain region, in conditions such that the first region is disposed with a predetermined distance from one edge of the gate electrode and has a P-type first concentration C, the second region is disposed with one edge positioned adjacent to the first region and the other edge overlapping the gate electrode and has a P-type second concentration C, and the third region is disposed with one edge positioned adjacent to the second region and the other edge positioned adjacent to the drain region and has a P-type third concentration C, wherein C&#x3e;C&#x3e;Cor C&#x2248;C&#x3e;C. The readout characteristic at a low voltage is satisfactory, and image defects such as white flaws and dark current are suppressed sufficiently.

Method of manufacturing solid-state imaging device with P-type diffusion layers

Solid-state imaging device with floating diffusion layer

A solid-state imaging device that achieves a reduction in variations appearing on a reproducing screen is provided. The solid-state imaging device includes a plurality of pixel cells that are laid out in matrix form on a semiconductor substrate and a driving unit that is provided to drive the plurality of pixel cells. Each of the plurality of pixel cells includes a photodiode, a MOS transistor, and an element isolating portionthat is formed so that the photodiode and the MOS transistor are isolated from each other. The element isolating portionis formed of a STI (Shallow Trench Isolation) that is a grooved portion of the semiconductor substrate. In the semiconductor substrate, a STI leakage stopperin which an impurity of a conductive type opposite to a conductive type of source/drain regions in the MOS transistor is introduced is formed to enclose side walls and a bottom face of the element isolating portion

Growing community of inventors

Kyoto, Japan

Mikiya Uchida