Sanyo Electric Co., Ltd.

Semiconductor Components Industries, LLC

Mikito Sakakibara

Tetsuro Asano

Toshikazu Hirai

Hidetoshi Ishihara

Koichi Hirata

Yoshibumi Nakajima

Shigeyuki Murai

Hisaaki Tominaga

Shigeo Kimura

Haruhiko Sakai

Hideyuki Inotsume

Katsuaki Onoda

Yuichi Kusaka

Takayoshi Higashino

Masahiro Uekawa

Katsuaki Onada

Toshikazu Hiraj

With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n-type region&#x2014;insulating region&#x2014;second n-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second nregions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

Method of forming a protecting element comprising a first high concentration impurity region separated by an insulating region of a substrate

With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n-type region-insulating region-second n-type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second nregions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.

Protecting element having first and second high concentration impurity regions separated by insulating region

A high-resistance element is connected as a part of a control resistor between a control terminal pad and a protecting element, immediately near the control terminal pad. Thus, even if a high-frequency analog signal leaks to the control resistor, the leaked signal is attenuated by the high-resistance element. This substantially eliminates the possibility of the high-frequency analog signal transmitting to the control terminal pad. Accordingly, an increase in insertion loss can be suppressed.

Compound semiconductor switch circuit device

A protecting element, comprising a first n+-type region, an insulating region, and a second n+-type region, is connected in parallel between two terminals of an FET. Since discharge across the first and second n+ regions is enabled, electrostatic energy that reaches the operating region of the FET can be attenuated without increasing the parasitic capacitance.

Semiconductor device

A separation element formed of one of a conduction region and a metal layer is placed between two elements in proximity to each other. The separation element is connected to a high resistance element and to a direct current terminal pad. A connection route extending from the direct current terminal pad to the separation element is a route in which a potential does not vibrate with high frequency. This results in a placement of a high frequency GND potential between the two elements, at least one of which is subjected to transmitting the high frequency signals, whereby leak of the high frequency signals can be prevented between the two elements.

Compound semiconductor device

A gate wiring electrode is formed into a ladder-like pattern. Moreover, between source electrodes and drain electrodes in the entire Switch MMIC, the gate wiring electrodes are disposed. Furthermore, at a cross part between the gate wiring electrode and the source electrode or the drain electrode, a nitride film having a large relative dielectric constant and a polyimide or a hollow part having a small relative dielectric constant are disposed. Accordingly, a capacitance at the cross part is reduced. Thus, a second harmonic wave level can be lowered. Moreover, a leak of a high-frequency signal between the drain electrode and the source electrode can be prevented. Thus, a third harmonic level can be lowered. Consequently, distortion characteristics of the Switch MMIC can be significantly improved.

Protecting elements are respectively connected between a control terminal Ctl and a ground terminal GND of a logic circuit L, between a point Cp and a ground terminal GND, and between a power supply terminal Vand a ground terminal GND thereof. With this, an E-FET, constituting an inverter, and capacitors Ci and Cr can be protected from electrostatic breakdown due to external static electricity. Since the protecting element can be constituted by requisite components for the logic circuit, an additional step or structure is not especially required to provide the protecting element.

Compound semiconductor switching circuit device

High resistance elements of 5 K&#x3a9; or more are connected near first and second control terminals between the first and second control terminals and respective crossing portion of first and second connectings. Even when a high frequency analog signal transmitted in a pad wire leaks to the first and second connectings, the high frequency analog signal is attenuated by the high resistance elements. Accordingly, the high frequency analog signal is not substantially transmitted to control terminal pads. It is therefore possible to suppress an increase in insertion loss.

With a microwave FET, the internalized Schottky junction capacitance or pn junction capacitance is small and these junctions are weak against static electricity. However, with a microwave device, a protecting diode could not be connected since the increase of parasitic capacitance resulting from this method causes degradation of the high frequency characteristics. Therefore, to eliminate this problem, a semiconductor device is provided, wherein two paths, extending from a gate electrode pad to a gate electrode on an operating region, are arranged, with one path running near a source electrode pad, the other path running near a drain electrode pad, and at the respective parts where a path becomes close to a pad, the abovementioned protecting elements are connected between the gate electrode and source electrode and between the gate electrode and drain electrode to improve the electrostatic breakdown voltage of the FET from approximately 100V to 700V.

A semiconductor switching device includes a plurality of metal layers. At least one of the metal layers forming a Schottky junction with a semi-insulating substrate or an insulating layer on a substrate. The device also includes an impurity diffusion region, and a high-concentration impurity region formed between two of the metal layers or between one of the metal layers and the impurity diffusion region so as to suppress expansion of a depletion layer from the corresponding metal layer.

Semiconductor device with impurity layer to prevent depletion layer expansion

Since improvement measures are not taken in regard to the electrostatic breakdown voltage, electrostatic breakdown voltages, between the common input terminal IN&#x2014;first control terminal Ctl-, between the common input terminal IN&#x2014;second control terminal Ctl-, between the first control terminal Ctl-&#x2014;the first output terminal OUT, and between the second control terminal Ctl-&#x2014;the second output terminal OUT, where both ends of gate Schottky junctions of FETs are lead out to the exterior, are low. To solve the problem, the embodiment of the invention provides a switch circuit device, wherein protecting elements are connected by disposing two electrode pads, for connection to a single control terminal, on a chip and positioning the electrode pads near the common input terminal pad I and an output terminal pad Oor O. The electrostatic energies that are applied between the first output terminal OUT&#x2014;the first control terminal Ctl-, between the common input terminal IN&#x2014;the first control terminal Ctl-, between the second output terminal OUT&#x2014;the second control terminal Ctl-, and between the common input terminal IN&#x2014;the second control terminal Ctl-can be respectively attenuated to the same degree and most efficiently.

Switching circuit device

Since a 5 GHz-band broadband has a frequency twice that of 2.4 GHz, the parasitic capacitance greatly influences deterioration in isolation of a switching device used in this frequency region. Therefore, to improve isolation, a shunt FET is added to the device. The switching device also includes a protecting element that has a first n-type region, an insulating region and a second n-type region. This protecting element is connected in parallel between two electrodes of the shunt FET. Since electrostatic charges are discharged between the first and second n-type regions, the electrostatic energy reaching an operation region of the shunt FET can be reduced without an increase in parasitic capacitance.

A semiconductor switching device includes two FETs with different device characteristics, a common input terminal, and two output terminals. A signal transmitting FET has a gate width of 500 &#x3bc;m and a signal receiving FET has a gate width of 400 &#x3bc;m. A resistor connecting a gate electrode and a control terminal of the signal transmitting FET is tightly configured to provide expanding space for the FET. Despite the reduced size, the switching device can allow a maximum power of 22.5 dBm to pass through because of the asymmetrical device design. The switching device operates at frequencies of 2.4 GHz or higher without use of shunt FET.

Semiconductor switching device

A semiconductor switching circuit device includes a field effect transistor having a source electrode, a gate electrode and a drain electrode, a first electrode pad connected to the source electrode or the drain electrode, and a second electrode pad connected to the source electrode or the drain electrode which is not connected to the first electrode pad. The device also includes a third electrode pad receiving a DC voltage and applying the DC voltage to the field effect transistor, a first insulating layer covering the field effect transistor, a metal layer disposed above the first insulating layer and connected to the third electrode pad, and a second insulating layer disposed on the metal layer. The third electrode pad may be a control terminal pad, a ground terminal pad or a terminal pad receiving a constant DC power voltage. The metal layer may be a flat sheet, a lattice or a comb-like structure.

Semiconductor switching circuit device

The conventional compound semiconductor switching device is prone to have a large chip size as the gate width needs to be large for achieving a low insertion loss and the separation between the connecting pad and the circuit wiring needs to be larger than 20 &#x3bc;m for obtaining a proper isolation between them. The overall chip size is reduced, first, by reducing the gate width of the switching FET operating at frequencies above 2.4 GHz to 700 &#x3bc;m or smaller together with the omission of the shunt FET, and, then, by reducing the separation between the connecting pad and the circuit wiring to 20 &#x3bc;m or smaller. This reduction of the separation is made possible by the introduction of an insulating film and a impurity region between the outermost portion of the connecting pad and the substrate for preventing the extension of the depletion layer. The manufacturing method of this device does not need any additional processing step for accommodating the above structure, and is capable of producing a device having a size of one fifth of the conventional device.

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Kumagaya, Japan

Mikito Sakakibara