Matsushita Electric Industrial Co., Ltd.

Nippon Hoso' Kyokai

Mikio Fujiwara

Hisashi Takayama

Satoshi Takayama

Toshihiro Uehara

Yasunori Kawakami

Hideki Ishii

Hotaka Minaguchi

Sigekazu Togashi

Katsuji Uro

Takayuki Minemaru

Yoshiyuki Goi

Takahiro Mitsui

The video signal processor of the present invention comprises a CCD for storing an inputted image by converting it into an electric charge through photoelectrical conversion to be stored by each field and then outputting the stored electric charge by each field; a shutter pulse generator for supplying a shutter pulse which adjusts storage time of the electric charge in the CCD; and a variable controller for variably controlling adjusting amount of electric charge storage time by the shutter pulse by a field unit.

Video signal processor

In order to provide an inexpensive binary data counting device of which the processing is done at high speed and which can be implemented with a small circuit scale, a shifter array is provided for outputting binary data of N bits, which comprises N&times;(N&plus;1)/2 shifters of which the control inputs are the data expressed in a binary manner comprising N bits so that binary data wherein is are filled in from the right in the same number as 1s in the data expressed in a binary manner comprising N bits are outputted by controlling the operation of each shifter in the shifter array with each bit value of the data expressed in a binary manner comprising N bits. An encoder is also provided for converting said binary data into a multi-valued number in accordance with the position of 1 in said binary data on the MSB side.

Binary data counter, area information extractor and huffman converter

In order to enhance adjustment efficiencies by automatic adjustment and gain excellent interchangeability overcoming the changes in characteristics due to variations in characteristics and wear of magnetic heads and the variations in characteristics of record media in high density recording/playback equipment, the present invention discloses a recording format provided with two recording areas of sinusoidal waves of a reference wavelength for making an adjustment of a playback amplifier and a short wavelength for making an adjustment of a playback equalizer, a recording area of adjustment data for detecting errors and making an accurate adjustment of the playback equalizer and a non-data area for recording system adjustment, and further provided on part of the foregoing areas with an indication that the medium is for automatic adjustment and at the same time with identification data to indicate kinds of the medium and, if necessary, to indicate kinds of the foregoing areas and also provided with time code, if needed, and discloses recording equipment for recording this recording format on a record medium and also automatic adjustment equipment for performing automatic adjustments by the use of data of the foregoing recording format on the reference record medium.

Recording format for automatic adjustment, recording device therefor and automatic adjustment device

After all the data words stored in a first scan transform RAM are initialized to '0's, only signed level data words are overwritten, based on zero runlength data words, on '0's at the positions designated by zigzag scan addresses in the first scan transform RAM. Thus, while only non-zero components out of 8.times.8 components forming one block are written in the first scan transform RAM, a block stored in a second scan transform RAM is read and initialized. Further, while only non-zero components of the next block are written in the second scan transform RAM, the block stored in the first scan transform RAM is read and initialized. This achieves, in real time, highly efficient runlength decoding responsive to a picture element clock signal of high frequency.

Decoding circuit for runlength codes

Image data is processed to enlarge and contract an original image, represented by the data, by P times in an X-axis direction while the data is subjected to interpolation. The letter P denotes an arbitrary positive rational number. It is supposed that each of regions among pixels of the original image is divided into sub areas having a number of N by M, that is, N in the X-axis direction and M in a Y-axis direction. The letter N denotes an arbitrary integer equal to or greater than 2. The letter M denotes an arbitrary integer equal to or greater than 1. An N-time interpolation enlarging device or step serves to execute an interpolation process determined by an original-image sub area corresponding to a pixel of an enlargement/contraction-resultant image while simultaneously generating a plurality of pieces of process-resultant data representing a part of an image enlarged from the original image by N times in the X-axis direction. An arbitrary-magnification enlarging/contracting device or step serves to subject the plurality of the pieces of the process-resultant data to image enlargement and contraction at an arbitrary magnification in the X-axis direction without executing interpolation, and also serves to process the plurality of the pieces of the process-resultant data to enlarge and contract an image, represented by the plurality of the pieces of the process-resultant data, by P/N times in the X-axis direction.

Hybrid interpolation and non-interpolation method and apparatus for

A digital signal recording/reproducing system specifically has an adaptive automatic equalizer for performing automatic waveform equalization disposed in a reproducing circuit of an RF system. In order to provide a run-up pattern which enables stable operation settlement of the adaptive automatic equalizer and a clock reproducing PLL at the time of reproduction, the digital signal recording/reproducing system comprises a run-up code generator for producing a run-up pattern composed of a combination of at least two digital value series of different inversion intervals. Thus, since an optimum run-up pattern for the reproducing circuit of the RF system is produced and recorded on a recording medium within a fixed period at the time recording, stable settlement of the operation of the clock reproducing PLL and the adaptive automatic equalizer is attained within a run-up period at the time of reproduction, thereby making it possible to suppress occurrence of a code error to a minimum.

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Osaka, Japan

Mikio Fujiwara